{"title":"运算放大器自动化设计的偏置驱动方法","authors":"Cheng-Wu Lin, Pin-Dai Sue, Ya-Ting Shyu, Soon-Jyh Chang","doi":"10.1109/VDAT.2009.5158109","DOIUrl":null,"url":null,"abstract":"This paper presents a transistor-level automation to perform component sizing, power optimization and layout generation for fully-differential operational amplifiers (op-amps). The design variables of the component sizing are bias voltages and bias currents. The free space of the variables is easy to be restricted by circuit constraints. A lookup-table-based scheme is presented to translate the variables into transistor dimensions without much preparing effort. The layout generation employs analog layout skills, such as device matching, dummy cell and guard ring, to have good quality.","PeriodicalId":246670,"journal":{"name":"2009 International Symposium on VLSI Design, Automation and Test","volume":"91 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-04-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"29","resultStr":"{\"title\":\"A bias-driven approach for automated design of operational amplifiers\",\"authors\":\"Cheng-Wu Lin, Pin-Dai Sue, Ya-Ting Shyu, Soon-Jyh Chang\",\"doi\":\"10.1109/VDAT.2009.5158109\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a transistor-level automation to perform component sizing, power optimization and layout generation for fully-differential operational amplifiers (op-amps). The design variables of the component sizing are bias voltages and bias currents. The free space of the variables is easy to be restricted by circuit constraints. A lookup-table-based scheme is presented to translate the variables into transistor dimensions without much preparing effort. The layout generation employs analog layout skills, such as device matching, dummy cell and guard ring, to have good quality.\",\"PeriodicalId\":246670,\"journal\":{\"name\":\"2009 International Symposium on VLSI Design, Automation and Test\",\"volume\":\"91 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-04-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"29\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 International Symposium on VLSI Design, Automation and Test\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VDAT.2009.5158109\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 International Symposium on VLSI Design, Automation and Test","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VDAT.2009.5158109","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A bias-driven approach for automated design of operational amplifiers
This paper presents a transistor-level automation to perform component sizing, power optimization and layout generation for fully-differential operational amplifiers (op-amps). The design variables of the component sizing are bias voltages and bias currents. The free space of the variables is easy to be restricted by circuit constraints. A lookup-table-based scheme is presented to translate the variables into transistor dimensions without much preparing effort. The layout generation employs analog layout skills, such as device matching, dummy cell and guard ring, to have good quality.