{"title":"QCA延迟不敏感串行加法器的设计","authors":"Elham Tabrizizadeh, Hamid reza Mohaqeq, A. Vafaei","doi":"10.1109/ICETET.2008.65","DOIUrl":null,"url":null,"abstract":"Although QCA (quantum dot cellular automata) has been introduced as a new kind of technology for over a decade, it still continues to be so and its merits and flaws are yet under study for future practical use. One of the problems of this technology is the dependency of its circuit timing to its layout. An asynchronous design methodology for QCA has been offered to solve this problem. The proposed methodology uses NCL (null convention logic) to approach this issue. Since asynchronous registers play an important role in NCL methodology, to ease the problem this work is aimed to design asynchronous registers and employ them to construct a delay insensitive serial adder. The results obtained so far can be used to assess the required cell counts, and space in future QCA system design.","PeriodicalId":269929,"journal":{"name":"2008 First International Conference on Emerging Trends in Engineering and Technology","volume":"40 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-07-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Designing QCA Delay-Insensitive Serial Adder\",\"authors\":\"Elham Tabrizizadeh, Hamid reza Mohaqeq, A. Vafaei\",\"doi\":\"10.1109/ICETET.2008.65\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Although QCA (quantum dot cellular automata) has been introduced as a new kind of technology for over a decade, it still continues to be so and its merits and flaws are yet under study for future practical use. One of the problems of this technology is the dependency of its circuit timing to its layout. An asynchronous design methodology for QCA has been offered to solve this problem. The proposed methodology uses NCL (null convention logic) to approach this issue. Since asynchronous registers play an important role in NCL methodology, to ease the problem this work is aimed to design asynchronous registers and employ them to construct a delay insensitive serial adder. The results obtained so far can be used to assess the required cell counts, and space in future QCA system design.\",\"PeriodicalId\":269929,\"journal\":{\"name\":\"2008 First International Conference on Emerging Trends in Engineering and Technology\",\"volume\":\"40 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-07-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 First International Conference on Emerging Trends in Engineering and Technology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICETET.2008.65\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 First International Conference on Emerging Trends in Engineering and Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICETET.2008.65","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Although QCA (quantum dot cellular automata) has been introduced as a new kind of technology for over a decade, it still continues to be so and its merits and flaws are yet under study for future practical use. One of the problems of this technology is the dependency of its circuit timing to its layout. An asynchronous design methodology for QCA has been offered to solve this problem. The proposed methodology uses NCL (null convention logic) to approach this issue. Since asynchronous registers play an important role in NCL methodology, to ease the problem this work is aimed to design asynchronous registers and employ them to construct a delay insensitive serial adder. The results obtained so far can be used to assess the required cell counts, and space in future QCA system design.