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引用次数: 5
摘要
我们提出了一种动态CMOS运算放大器，它具有一个特殊的输入电路，该电路根据输入信号注入额外的偏置电流以增加旋转速率。在采样保持电路中，将该运算放大器的性能与传统运算放大器进行了比较。采样保持电路的最大工作时钟频率从290 kHz增加到1 MHz，保持电容为1 nF。该放大器采用5 μ m CMOS工艺制造，其静态功耗为7.5 mW。
A Very High Slew-Rate Dynamic CMOS Operational Amplifier
We present a dynamic CMOS operational amplifier with a special input circuit which injects an extra bias current to increase the slew-rate, depending on the input signal. The performance of this operational amplifier is compared to a conventional operational amplifier when used in a sample&hold circuit. The maximum operating clock frequency of the sample&hold circuit increases from 290 kHz up to 1 MHz with a hold-capacitor of 1 nF. The amplifier has been fabricated in a 5 ¿m CMOS process and dissipates a static power of 7.5 mW.
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