一种组合选择校准的片上测量电路

2006 IEEE International SOC Conference Pub Date : 2006-09-01 DOI:10.1109/SOCC.2006.283844

J. Maunu, J. Marku, M. Laiho, A. Paasio

{"title":"一种组合选择校准的片上测量电路","authors":"J. Maunu, J. Marku, M. Laiho, A. Paasio","doi":"10.1109/SOCC.2006.283844","DOIUrl":null,"url":null,"abstract":"We present an on-chip measurement circuit for current source calibration by combination selection in current and future CMOS technologies. The circuit evaluates the output current values and selects a current that ensures 99% mismatch compensation accuracy with 4 sigma yield.","PeriodicalId":345714,"journal":{"name":"2006 IEEE International SOC Conference","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"An On-Chip Measurement Circuit for Calibration by Combination Selection\",\"authors\":\"J. Maunu, J. Marku, M. Laiho, A. Paasio\",\"doi\":\"10.1109/SOCC.2006.283844\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We present an on-chip measurement circuit for current source calibration by combination selection in current and future CMOS technologies. The circuit evaluates the output current values and selects a current that ensures 99% mismatch compensation accuracy with 4 sigma yield.\",\"PeriodicalId\":345714,\"journal\":{\"name\":\"2006 IEEE International SOC Conference\",\"volume\":\"24 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 IEEE International SOC Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOCC.2006.283844\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE International SOC Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCC.2006.283844","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 6

摘要

我们提出了一种芯片上的测量电路，通过当前和未来CMOS技术的组合选择来校准电流源。电路评估输出电流值，并选择一个电流，以确保99%的失配补偿精度和4西格玛良率。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文

微信好友朋友圈 QQ好友复制链接

本刊更多论文

An On-Chip Measurement Circuit for Calibration by Combination Selection

We present an on-chip measurement circuit for current source calibration by combination selection in current and future CMOS technologies. The circuit evaluates the output current values and selects a current that ensures 99% mismatch compensation accuracy with 4 sigma yield.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

2006 IEEE International SOC Conference

自引率

0.00%

发文量

期刊最新文献

Architecture for Energy Efficient Sphere Decoding Design of Low Power Digital Phase Lock Loops A Novel 8-Phase PLL Design for PWM Scheme in High Speed I/O Circuits Interrupt Communication on the SegBus platform A Detailed Vth-Variation Analysis for Sub-100-nm Embedded SRAM Design