在芯片结构上实现同质胖树网络的部分分组路由

Abhijit Biswas, H. J. Mahanta, M. Hussain
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引用次数: 7

摘要

随着消费电子市场的不断发展,对产品设计的紧凑型和产品上市时间的要求越来越严格,传统的芯片设计方法已经无法满足这些要求。随着片上网络的发展,研究人员已经做出了诚实的努力来解决这些问题,但设计一个鼓励组件可重用性和可扩展的网络仍然是一个需要更多改进的领域。本文提出了一种基于胖树的芯片网络。详细描述了节点和交换机网络的整体设计。所提出的体系结构已在一个基于c++的模拟器上实现并进行了分析。本文最后给出了分析结果。
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Implementing a partial group based routing for homogeneous fat tree network on chip architecture
As the growing consumer electronic market imposes constraint such as compact product design and strict time to market, the traditional method of chip designing failed miserably to satisfy these constraints. With the evolution of Network-on-Chip, researchers have made an honest effort to resolve such issues but designing a network which encourages reusability of components and also scalable still remains an area where more refinement is necessary. In this paper we present before you a fat tree based network on chip. The entire design of the network with the nodes and switches has been described in details. The proposed architecture has been implemented and analyzed in a C++ based simulator. The analysis results have been presented at the end of the paper.
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