Programmable, switched-capacitor finite impulse response filter realized in CMOS technology for education purposes

The paper reports comprehensive laboratory tests of a mixed analog-digital, application specific integrated circuit (ASIC). The realized chip is a programmable device. It contains such components as an operational amplifier, a sample-and-hold (S&H) element, programmable array of capacitors, multiphase clock generator and a programmable switched capacitor (SC) delay line. All these blocks may be used separately or may be coupled together into a finite impulse response (FIR) filter, with reconfigurable frequency response. Since the filter coefficients may be either positive or negative, therefore both lowpass or highpass frequency responses may be obtained. The chip has been designed in the AMS CMOS $0.35\ \mu \mathbf{m}$ technology and occupies the area of 0.5 mm2. It was designed for educational purposes. Programming and testing of the chip was made with the computer-controlled interface prepared in the National Instruments LabVIEW environment. The presented solutions allow for conducting of various laboratory exercises.