{"title":"基于RocketChip的片上加速器性能评价","authors":"Jinghe Wei, Zongguang Yu, De Liu","doi":"10.1109/ICCS51219.2020.9336609","DOIUrl":null,"url":null,"abstract":"In the fields of artificial intelligence and signal processing where computing tasks are dense or algorithms are complex, researchers usually design heterogeneous SoC of CPU + accelerator to improve the efficiency of system. In heterogeneous SoC, accelerators often act as coprocessors or channel accelerators. In this paper, in order to study the coupling relationship between accelerators and CPU, we respectively design CORDIC algorithm accelerators of coprocessor, CORIDC channel accelerator, vector dot product accelerators of coprocessor and channel accelerator based on RISC-V open source project - RocketChip. The acceleration effect of each accelerator is simulated by Modelsim. It is verified that the acceleration ratio of CORDIC algorithm coprocessor to CPU is about 151 times, and the accelerator ratio of CORDIC channel accelerator is about 103 times. The longer the vector length is, the more significant the acceleration effect of the vector dot product accelerator is, and the acceleration effect of the vector dot product channel accelerator is significantly better than that of the vector dot product coprocessor. We find that the performance of the coprocessor is limited by the speed of data access. Moreover, when the coprocessor is not tightly coupled to the CPU, additional time overhead is introduced.","PeriodicalId":193552,"journal":{"name":"2020 IEEE 2nd International Conference on Circuits and Systems (ICCS)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Evaluation of On-Chip Accelerator Performance Based on RocketChip\",\"authors\":\"Jinghe Wei, Zongguang Yu, De Liu\",\"doi\":\"10.1109/ICCS51219.2020.9336609\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In the fields of artificial intelligence and signal processing where computing tasks are dense or algorithms are complex, researchers usually design heterogeneous SoC of CPU + accelerator to improve the efficiency of system. In heterogeneous SoC, accelerators often act as coprocessors or channel accelerators. In this paper, in order to study the coupling relationship between accelerators and CPU, we respectively design CORDIC algorithm accelerators of coprocessor, CORIDC channel accelerator, vector dot product accelerators of coprocessor and channel accelerator based on RISC-V open source project - RocketChip. The acceleration effect of each accelerator is simulated by Modelsim. It is verified that the acceleration ratio of CORDIC algorithm coprocessor to CPU is about 151 times, and the accelerator ratio of CORDIC channel accelerator is about 103 times. The longer the vector length is, the more significant the acceleration effect of the vector dot product accelerator is, and the acceleration effect of the vector dot product channel accelerator is significantly better than that of the vector dot product coprocessor. We find that the performance of the coprocessor is limited by the speed of data access. Moreover, when the coprocessor is not tightly coupled to the CPU, additional time overhead is introduced.\",\"PeriodicalId\":193552,\"journal\":{\"name\":\"2020 IEEE 2nd International Conference on Circuits and Systems (ICCS)\",\"volume\":\"39 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-12-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE 2nd International Conference on Circuits and Systems (ICCS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCS51219.2020.9336609\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE 2nd International Conference on Circuits and Systems (ICCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCS51219.2020.9336609","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Evaluation of On-Chip Accelerator Performance Based on RocketChip
In the fields of artificial intelligence and signal processing where computing tasks are dense or algorithms are complex, researchers usually design heterogeneous SoC of CPU + accelerator to improve the efficiency of system. In heterogeneous SoC, accelerators often act as coprocessors or channel accelerators. In this paper, in order to study the coupling relationship between accelerators and CPU, we respectively design CORDIC algorithm accelerators of coprocessor, CORIDC channel accelerator, vector dot product accelerators of coprocessor and channel accelerator based on RISC-V open source project - RocketChip. The acceleration effect of each accelerator is simulated by Modelsim. It is verified that the acceleration ratio of CORDIC algorithm coprocessor to CPU is about 151 times, and the accelerator ratio of CORDIC channel accelerator is about 103 times. The longer the vector length is, the more significant the acceleration effect of the vector dot product accelerator is, and the acceleration effect of the vector dot product channel accelerator is significantly better than that of the vector dot product coprocessor. We find that the performance of the coprocessor is limited by the speed of data access. Moreover, when the coprocessor is not tightly coupled to the CPU, additional time overhead is introduced.