S. Yoshikawa, H. Nagano, T. Suzuki, H. Nakane, M. Shinohara, T. Murase, G. Ramamurthy
{"title":"大型输入输出缓冲式ATM开关","authors":"S. Yoshikawa, H. Nagano, T. Suzuki, H. Nakane, M. Shinohara, T. Murase, G. Ramamurthy","doi":"10.1109/ATM.1999.786847","DOIUrl":null,"url":null,"abstract":"ATM switches, which serve as nodes in ATM public backbone networks, are required to have a large capacity due to the increase of traffic. This paper proposes a large-scale ATM switch architecture providing 160 Gbit/s switching capability. It is such that the output buffered switch elements are expanded in square grids. Our switch architecture achieves non-blocking and multi-QoS guarantee. As a way to ensure multi-QoS, we employ a stop-shape-go (SSG) congestion control method and its performance is evaluated by simulation.","PeriodicalId":266412,"journal":{"name":"IEEE ATM Workshop '99 Proceedings (Cat. No. 99TH8462)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"1999-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Large scale input and output buffered ATM switch\",\"authors\":\"S. Yoshikawa, H. Nagano, T. Suzuki, H. Nakane, M. Shinohara, T. Murase, G. Ramamurthy\",\"doi\":\"10.1109/ATM.1999.786847\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"ATM switches, which serve as nodes in ATM public backbone networks, are required to have a large capacity due to the increase of traffic. This paper proposes a large-scale ATM switch architecture providing 160 Gbit/s switching capability. It is such that the output buffered switch elements are expanded in square grids. Our switch architecture achieves non-blocking and multi-QoS guarantee. As a way to ensure multi-QoS, we employ a stop-shape-go (SSG) congestion control method and its performance is evaluated by simulation.\",\"PeriodicalId\":266412,\"journal\":{\"name\":\"IEEE ATM Workshop '99 Proceedings (Cat. No. 99TH8462)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1999-05-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE ATM Workshop '99 Proceedings (Cat. No. 99TH8462)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ATM.1999.786847\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE ATM Workshop '99 Proceedings (Cat. No. 99TH8462)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ATM.1999.786847","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
ATM switches, which serve as nodes in ATM public backbone networks, are required to have a large capacity due to the increase of traffic. This paper proposes a large-scale ATM switch architecture providing 160 Gbit/s switching capability. It is such that the output buffered switch elements are expanded in square grids. Our switch architecture achieves non-blocking and multi-QoS guarantee. As a way to ensure multi-QoS, we employ a stop-shape-go (SSG) congestion control method and its performance is evaluated by simulation.
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