{"title":"LEDA:加密电路的锁使能差分分析","authors":"Devanshi Upadhyaya, Mael Gay, I. Polian","doi":"10.1109/HOST55118.2023.10133696","DOIUrl":null,"url":null,"abstract":"Hardware implementations of cryptographic primitives require protection against physical attacks and supplychain threats at the same time. This raises the question of secure composability of different attack countermeasures, i.e., whether protecting a circuit against one threat can make it more vulnerable against a different threat. In this paper, we study the consequences of applying logic locking, a popular design-for-trust solution against intellectual property piracy and overproduction, to cryptographic circuits. We show that the ability to unlock the circuit incorrectly gives the adversary new powerful attack options. We introduce L.EDA (locking-enabled differential analysis), a new attack vector on logic locked cryptographic circuits In many cases, logic locking has made circuit implementations prone to classical algebraic attacks. We investigate in depth its success factors. In addition, we consider L.EDFA (locking-enabled differential fault analysis), a fault-assisted version of LEDA, and demonstrate for several ciphers and families of locking schemes that fault attacks become possible (or consistently easier) for incorrectly unlocked circuits Our results indicate that logic locking is not safe to use in cryptographic circuits, making them less rather than more secure.","PeriodicalId":128125,"journal":{"name":"2023 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"LEDA: Locking Enabled Differential Analysis of Cryptographic Circuits\",\"authors\":\"Devanshi Upadhyaya, Mael Gay, I. Polian\",\"doi\":\"10.1109/HOST55118.2023.10133696\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Hardware implementations of cryptographic primitives require protection against physical attacks and supplychain threats at the same time. This raises the question of secure composability of different attack countermeasures, i.e., whether protecting a circuit against one threat can make it more vulnerable against a different threat. In this paper, we study the consequences of applying logic locking, a popular design-for-trust solution against intellectual property piracy and overproduction, to cryptographic circuits. We show that the ability to unlock the circuit incorrectly gives the adversary new powerful attack options. We introduce L.EDA (locking-enabled differential analysis), a new attack vector on logic locked cryptographic circuits In many cases, logic locking has made circuit implementations prone to classical algebraic attacks. We investigate in depth its success factors. In addition, we consider L.EDFA (locking-enabled differential fault analysis), a fault-assisted version of LEDA, and demonstrate for several ciphers and families of locking schemes that fault attacks become possible (or consistently easier) for incorrectly unlocked circuits Our results indicate that logic locking is not safe to use in cryptographic circuits, making them less rather than more secure.\",\"PeriodicalId\":128125,\"journal\":{\"name\":\"2023 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)\",\"volume\":\"3 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-05-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2023 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/HOST55118.2023.10133696\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HOST55118.2023.10133696","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
LEDA: Locking Enabled Differential Analysis of Cryptographic Circuits
Hardware implementations of cryptographic primitives require protection against physical attacks and supplychain threats at the same time. This raises the question of secure composability of different attack countermeasures, i.e., whether protecting a circuit against one threat can make it more vulnerable against a different threat. In this paper, we study the consequences of applying logic locking, a popular design-for-trust solution against intellectual property piracy and overproduction, to cryptographic circuits. We show that the ability to unlock the circuit incorrectly gives the adversary new powerful attack options. We introduce L.EDA (locking-enabled differential analysis), a new attack vector on logic locked cryptographic circuits In many cases, logic locking has made circuit implementations prone to classical algebraic attacks. We investigate in depth its success factors. In addition, we consider L.EDFA (locking-enabled differential fault analysis), a fault-assisted version of LEDA, and demonstrate for several ciphers and families of locking schemes that fault attacks become possible (or consistently easier) for incorrectly unlocked circuits Our results indicate that logic locking is not safe to use in cryptographic circuits, making them less rather than more secure.