C. Choi, Hwa-Hyun Cho, J. Chae, Jin-Sung Park, Byong-Heon Kwon, Myung-Ryul Choi
{"title":"用于SXGA/UXGA FPD的图像处理器","authors":"C. Choi, Hwa-Hyun Cho, J. Chae, Jin-Sung Park, Byong-Heon Kwon, Myung-Ryul Choi","doi":"10.1109/APASIC.1999.824076","DOIUrl":null,"url":null,"abstract":"We present an image processor for SXGA (super extended graphics array, 1280/spl times/1024)/UXGA (ultra XGA, 1600/spl times/1200) FPD (flat panel display) such as TFT (thin film transistor) LCD (liquid crystal display) and PDP (plasma display panel). The proposed image processor can display the full screen of a FPD with lower or higher resolution of video sources such as NTSC, VGA, SVGA, XGA, SXGA, and UXGA by means of a new interpolation and decimation filters. Also, in order to improve an image quality of a FPD we present some video processing techniques such as /spl gamma/(gamma)-correction, contrast control, and edge enhancement. We have simulated the proposed interpolation and decimation algorithm and compared the results of the proposed algorithms with those of other conventional algorithms quantitatively by calculating PSNR (peak signal noise ratio). We have also simulated the proposed video processing techniques and compared the results by visual test. And we have designed the proposed image processor by VHDL and verified it by functional and timing simulation.","PeriodicalId":346808,"journal":{"name":"AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360)","volume":"82 2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-08-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"An image processor for SXGA/UXGA FPD\",\"authors\":\"C. Choi, Hwa-Hyun Cho, J. Chae, Jin-Sung Park, Byong-Heon Kwon, Myung-Ryul Choi\",\"doi\":\"10.1109/APASIC.1999.824076\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We present an image processor for SXGA (super extended graphics array, 1280/spl times/1024)/UXGA (ultra XGA, 1600/spl times/1200) FPD (flat panel display) such as TFT (thin film transistor) LCD (liquid crystal display) and PDP (plasma display panel). The proposed image processor can display the full screen of a FPD with lower or higher resolution of video sources such as NTSC, VGA, SVGA, XGA, SXGA, and UXGA by means of a new interpolation and decimation filters. Also, in order to improve an image quality of a FPD we present some video processing techniques such as /spl gamma/(gamma)-correction, contrast control, and edge enhancement. We have simulated the proposed interpolation and decimation algorithm and compared the results of the proposed algorithms with those of other conventional algorithms quantitatively by calculating PSNR (peak signal noise ratio). We have also simulated the proposed video processing techniques and compared the results by visual test. And we have designed the proposed image processor by VHDL and verified it by functional and timing simulation.\",\"PeriodicalId\":346808,\"journal\":{\"name\":\"AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360)\",\"volume\":\"82 2 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1999-08-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APASIC.1999.824076\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APASIC.1999.824076","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
We present an image processor for SXGA (super extended graphics array, 1280/spl times/1024)/UXGA (ultra XGA, 1600/spl times/1200) FPD (flat panel display) such as TFT (thin film transistor) LCD (liquid crystal display) and PDP (plasma display panel). The proposed image processor can display the full screen of a FPD with lower or higher resolution of video sources such as NTSC, VGA, SVGA, XGA, SXGA, and UXGA by means of a new interpolation and decimation filters. Also, in order to improve an image quality of a FPD we present some video processing techniques such as /spl gamma/(gamma)-correction, contrast control, and edge enhancement. We have simulated the proposed interpolation and decimation algorithm and compared the results of the proposed algorithms with those of other conventional algorithms quantitatively by calculating PSNR (peak signal noise ratio). We have also simulated the proposed video processing techniques and compared the results by visual test. And we have designed the proposed image processor by VHDL and verified it by functional and timing simulation.
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