Jiamei Lv, J. Wen, Long Wang, Qingping Zhang, Yonghe Wang
{"title":"基于65nm CMOS工艺的DC-110GHz连续可变衰减器","authors":"Jiamei Lv, J. Wen, Long Wang, Qingping Zhang, Yonghe Wang","doi":"10.1109/EDAPS.2017.8277052","DOIUrl":null,"url":null,"abstract":"Continuous variable attenuator with wide bandwidth has been designed and fabricated in a 65nm CMOS process. This π-type with three shunt FETs in one side demonstrates state-of-the art performance showing a minimum insertion loss of 0.13–2.48 dB and good matching across the whole band. The attenuator has a continuous controllability from DC-110GHz with an attenuation range more than 16 dB as voltage bias changed constantly varies from 0 to 1.2V. Measurements also show return loss is greater than −22dB from 10 to 110GHz. The chip size is 340×280um2 and the core area is 26×109um2.","PeriodicalId":329279,"journal":{"name":"2017 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"DC-110GHz continuous variable attenuator based on 65nm CMOS process\",\"authors\":\"Jiamei Lv, J. Wen, Long Wang, Qingping Zhang, Yonghe Wang\",\"doi\":\"10.1109/EDAPS.2017.8277052\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Continuous variable attenuator with wide bandwidth has been designed and fabricated in a 65nm CMOS process. This π-type with three shunt FETs in one side demonstrates state-of-the art performance showing a minimum insertion loss of 0.13–2.48 dB and good matching across the whole band. The attenuator has a continuous controllability from DC-110GHz with an attenuation range more than 16 dB as voltage bias changed constantly varies from 0 to 1.2V. Measurements also show return loss is greater than −22dB from 10 to 110GHz. The chip size is 340×280um2 and the core area is 26×109um2.\",\"PeriodicalId\":329279,\"journal\":{\"name\":\"2017 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS)\",\"volume\":\"5 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EDAPS.2017.8277052\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDAPS.2017.8277052","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
DC-110GHz continuous variable attenuator based on 65nm CMOS process
Continuous variable attenuator with wide bandwidth has been designed and fabricated in a 65nm CMOS process. This π-type with three shunt FETs in one side demonstrates state-of-the art performance showing a minimum insertion loss of 0.13–2.48 dB and good matching across the whole band. The attenuator has a continuous controllability from DC-110GHz with an attenuation range more than 16 dB as voltage bias changed constantly varies from 0 to 1.2V. Measurements also show return loss is greater than −22dB from 10 to 110GHz. The chip size is 340×280um2 and the core area is 26×109um2.
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