组合逻辑电路的进化多目标设计

C. C. Coello, A. H. Aguirre, B. Buckles
{"title":"组合逻辑电路的进化多目标设计","authors":"C. C. Coello, A. H. Aguirre, B. Buckles","doi":"10.1109/EH.2000.869354","DOIUrl":null,"url":null,"abstract":"In this paper, we propose an evolutionary multiobjective optimization approach to design combinational logic circuits. The idea is to use a population-based technique that considers outputs of a circuit as equality constraints that we aim to satisfy. A small sub-population is assigned to each objective. After one of these objectives is satisfied, its corresponding sub-population is merged with the rest of the individuals in what becomes a joint effort to minimize the total amount of mismatches produced (between the encoded circuit and the truth table). Once a feasible individual is found, all individuals cooperate to minimize its number of gates. The approach seems to reduce the amount of computer resources required to design combinational logic circuits, when compared to our previous research in this area.","PeriodicalId":432338,"journal":{"name":"Proceedings. The Second NASA/DoD Workshop on Evolvable Hardware","volume":"46 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-07-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"67","resultStr":"{\"title\":\"Evolutionary multiobjective design of combinational logic circuits\",\"authors\":\"C. C. Coello, A. H. Aguirre, B. Buckles\",\"doi\":\"10.1109/EH.2000.869354\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we propose an evolutionary multiobjective optimization approach to design combinational logic circuits. The idea is to use a population-based technique that considers outputs of a circuit as equality constraints that we aim to satisfy. A small sub-population is assigned to each objective. After one of these objectives is satisfied, its corresponding sub-population is merged with the rest of the individuals in what becomes a joint effort to minimize the total amount of mismatches produced (between the encoded circuit and the truth table). Once a feasible individual is found, all individuals cooperate to minimize its number of gates. The approach seems to reduce the amount of computer resources required to design combinational logic circuits, when compared to our previous research in this area.\",\"PeriodicalId\":432338,\"journal\":{\"name\":\"Proceedings. The Second NASA/DoD Workshop on Evolvable Hardware\",\"volume\":\"46 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-07-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"67\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. The Second NASA/DoD Workshop on Evolvable Hardware\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EH.2000.869354\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. The Second NASA/DoD Workshop on Evolvable Hardware","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EH.2000.869354","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 67

摘要

在本文中,我们提出一种进化的多目标优化方法来设计组合逻辑电路。这个想法是使用基于人口的技术,将电路的输出视为我们要满足的相等约束。每个目标都分配了一个小的子群体。在其中一个目标得到满足后,其相应的子种群与其他个体合并,成为共同努力,以尽量减少产生的不匹配总数(在编码电路和真值表之间)。一旦找到一个可行的个体,所有个体就会合作使其门的数量最小化。与我们之前在该领域的研究相比,这种方法似乎减少了设计组合逻辑电路所需的计算机资源的数量。
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Evolutionary multiobjective design of combinational logic circuits
In this paper, we propose an evolutionary multiobjective optimization approach to design combinational logic circuits. The idea is to use a population-based technique that considers outputs of a circuit as equality constraints that we aim to satisfy. A small sub-population is assigned to each objective. After one of these objectives is satisfied, its corresponding sub-population is merged with the rest of the individuals in what becomes a joint effort to minimize the total amount of mismatches produced (between the encoded circuit and the truth table). Once a feasible individual is found, all individuals cooperate to minimize its number of gates. The approach seems to reduce the amount of computer resources required to design combinational logic circuits, when compared to our previous research in this area.
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