Monolithic Optical Interconnects in Zero-Change CMOS

Here, I present recent device and system results on monolithic electronic-photonic platforms developed in partially-depleted SOI CMOS, in which photonic functions are implemented with 'zero change' to the fabrication process, and solely by way of design. This platform enables the integration of photonic components, analog and digital circuits, all on a single chip, to achieve the performance and scalability needed for optical interconnects with Terabits per second data rates for high performance computing and data center applications. The resonance-based transmitters and receivers enabled by on-chip mixed-signal resonance stabilization circuits, along with very small electrical parasitics offer high bandwidth densities and sub-pJ/bit on-chip link energy consumptions to achieve Tb/s-scale optical interconnects through WDM systems.