基于不平衡混频器单元的低压、低功耗、高增益混频器

2006 European Microwave Integrated Circuits Conference Pub Date : 2006-09-01 DOI:10.1109/EMICC.2006.282665

Nogil Myoung, H. S. Kang, Seok Tae Kim, Byoung Gun Choi, Seong-Su Park, C. Park

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引用次数: 13

摘要

提出了一种适用于5GHz无线局域网的基于非平衡混频器单元或平方律混频器单元的低电压、低功耗、高增益混频器核心结构。为了降低功耗，提出了一种低电压、电流复用技术的新型单平衡混频器。电路采用0.18 μ m CMOS工艺设计。所设计的下变频混频器最大转换增益为22dB，本端功率为-2.5dBm。然而，当本端功率为-10dBm、-15dBm和-20dBm时，混频器的转换增益适中，分别为14.9dB、10dB和5.1dB，输入P1dB分别为-14dBm、-9.5dBm和-4.5dBm，输入IP3分别为-4.5dBm、0dBm和5dBm。设计的混频器包括一个偏置电路，在1.5V电源电压下消耗1.2mA。包括衬垫在内的芯片尺寸为0.77mm × 0.81mm

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Low-voltage, Low-power and High-gain Mixer Based on Unbalanced Mixer Cell

A low-voltage, low-power and high-gain mixer core structure based on the unbalanced mixer cell or square-law mixer cell for 5GHz wireless LAN applications is presented in this paper. To reduce power dissipation, a new single-balanced mixer was proposed which operates under a low supply voltage and with the current reuse technique. The circuit was designed with a 0.18mum CMOS process. The designed down-conversion mixer has a maximum conversion gain of 22dB with LO power of -2.5dBm. However, with small LO power of -10dBm, -15dBm and -20dBm the mixer shows a moderate conversion gain of 14.9dB, 10dB and 5.1dB, and an input P1dB of -14dBm, -9.5dBm and -4.5dBm, and an input IP3 of -4.5dBm, 0dBm and 5dBm, respectively. The designed mixer including a bias circuit consumes 1.2mA under a 1.5V supply voltage. The chip size including pads is 0.77mm times 0.81mm

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2006 European Microwave Integrated Circuits Conference

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