{"title":"纳米级CMOS动态锁存器和触发器的泄漏补偿技术","authors":"M. Hansson, A. Alvandpour","doi":"10.1109/SOCC.2006.283850","DOIUrl":null,"url":null,"abstract":"This paper presents analysis and measurement of a leakage current compensation technique aimed to preserve traditional operation of dynamic flip-flops in nano-scale CMOS. Over 7.4X larger leakage tolerance was observed for a dynamic transmission-gate flip-flop utilizing the proposed technique. Furthermore, a conditional static keeper ensures robust operation at low-frequency/standby..","PeriodicalId":345714,"journal":{"name":"2006 IEEE International SOC Conference","volume":"89 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"A Leakage Compensation Technique for Dynamic Latches and Flip-Flops in Nano-Scale CMOS\",\"authors\":\"M. Hansson, A. Alvandpour\",\"doi\":\"10.1109/SOCC.2006.283850\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents analysis and measurement of a leakage current compensation technique aimed to preserve traditional operation of dynamic flip-flops in nano-scale CMOS. Over 7.4X larger leakage tolerance was observed for a dynamic transmission-gate flip-flop utilizing the proposed technique. Furthermore, a conditional static keeper ensures robust operation at low-frequency/standby..\",\"PeriodicalId\":345714,\"journal\":{\"name\":\"2006 IEEE International SOC Conference\",\"volume\":\"89 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 IEEE International SOC Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOCC.2006.283850\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE International SOC Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCC.2006.283850","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Leakage Compensation Technique for Dynamic Latches and Flip-Flops in Nano-Scale CMOS
This paper presents analysis and measurement of a leakage current compensation technique aimed to preserve traditional operation of dynamic flip-flops in nano-scale CMOS. Over 7.4X larger leakage tolerance was observed for a dynamic transmission-gate flip-flop utilizing the proposed technique. Furthermore, a conditional static keeper ensures robust operation at low-frequency/standby..