完全集成的串行链路接收器与光学接口,用于长途显示互连

Kang-Yeob Park, W. Oh, Y. Lee, W. Choi
{"title":"完全集成的串行链路接收器与光学接口,用于长途显示互连","authors":"Kang-Yeob Park, W. Oh, Y. Lee, W. Choi","doi":"10.1049/iet-cds.2012.0029","DOIUrl":null,"url":null,"abstract":"We report a fully integrated serial-link receiver with optical interface fabricated with a 0.18 µm complementary metal oxide semiconductor technology for long-haul display interconnects. The receiver includes a trans-impedance amplifier, a limiting amplifier, a clock and data recovery circuit, 1:64 de-multiplexer and a built-in error checker. The receiver produces 64-bit wide electrical signals from photodetector output signals produced by 5.28, 5.6 or 6.25 Gb/s optical signals delivered through up to 700-m multi-mode fibre. It can support serialised data for Ultra eXtended Graphics Array (UXGA), 1080 p and Wide Ultra eXtended Graphics Array (WUXGA). The receiver core occupies 0.59 mm2 with 42.4 mW power dissipation at 6.25 Gb/s bit rate from a 1.8 V supply.","PeriodicalId":120076,"journal":{"name":"IET Circuits Devices Syst.","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Fully integrated serial-link receiver with optical interface for long-haul display interconnects\",\"authors\":\"Kang-Yeob Park, W. Oh, Y. Lee, W. Choi\",\"doi\":\"10.1049/iet-cds.2012.0029\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We report a fully integrated serial-link receiver with optical interface fabricated with a 0.18 µm complementary metal oxide semiconductor technology for long-haul display interconnects. The receiver includes a trans-impedance amplifier, a limiting amplifier, a clock and data recovery circuit, 1:64 de-multiplexer and a built-in error checker. The receiver produces 64-bit wide electrical signals from photodetector output signals produced by 5.28, 5.6 or 6.25 Gb/s optical signals delivered through up to 700-m multi-mode fibre. It can support serialised data for Ultra eXtended Graphics Array (UXGA), 1080 p and Wide Ultra eXtended Graphics Array (WUXGA). The receiver core occupies 0.59 mm2 with 42.4 mW power dissipation at 6.25 Gb/s bit rate from a 1.8 V supply.\",\"PeriodicalId\":120076,\"journal\":{\"name\":\"IET Circuits Devices Syst.\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IET Circuits Devices Syst.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1049/iet-cds.2012.0029\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IET Circuits Devices Syst.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1049/iet-cds.2012.0029","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

摘要

我们报告了一种完全集成的串行链路接收器,其光接口采用0.18 μ m互补金属氧化物半导体技术制造,用于长距离显示互连。接收机包括一个反阻抗放大器、一个限幅放大器、一个时钟和数据恢复电路、1:64解复用器和一个内置错误检查器。接收器从光电探测器输出的5.28、5.6或6.25 Gb/s光信号中产生64位宽电信号,这些光信号通过长达700米的多模光纤传输。它可以支持超扩展图形阵列(UXGA), 1080p和宽超扩展图形阵列(WUXGA)的序列化数据。在1.8 V电源下,在6.25 Gb/s比特率下,接收器核心占地0.59 mm2,功耗42.4 mW。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
Fully integrated serial-link receiver with optical interface for long-haul display interconnects
We report a fully integrated serial-link receiver with optical interface fabricated with a 0.18 µm complementary metal oxide semiconductor technology for long-haul display interconnects. The receiver includes a trans-impedance amplifier, a limiting amplifier, a clock and data recovery circuit, 1:64 de-multiplexer and a built-in error checker. The receiver produces 64-bit wide electrical signals from photodetector output signals produced by 5.28, 5.6 or 6.25 Gb/s optical signals delivered through up to 700-m multi-mode fibre. It can support serialised data for Ultra eXtended Graphics Array (UXGA), 1080 p and Wide Ultra eXtended Graphics Array (WUXGA). The receiver core occupies 0.59 mm2 with 42.4 mW power dissipation at 6.25 Gb/s bit rate from a 1.8 V supply.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
A low-offset low-power and high-speed dynamic latch comparator with a preamplifier-enhanced stage Embedding delay-based physical unclonable functions in networks-on-chip Design of 10T SRAM cell with improved read performance and expanded write margin On the applicability of two-bit carbon nanotube through-silicon via for power distribution networks in 3-D integrated circuits Analytical model and simulation-based analysis of a work function engineered triple metal tunnel field-effect transistor device showing excellent device performance
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1