20nm CMOS的23mW, 73dB动态范围，80MHz BW连续时间delta-sigma调制器

2014 Symposium on VLSI Circuits Digest of Technical Papers Pub Date : 2014-06-10 DOI:10.1109/VLSIC.2014.6858396

S. Ho, Chilun Lo, Z. Ru, Jialin Zhao

{"title":"20nm CMOS的23mW, 73dB动态范围，80MHz BW连续时间delta-sigma调制器","authors":"S. Ho, Chilun Lo, Z. Ru, Jialin Zhao","doi":"10.1109/VLSIC.2014.6858396","DOIUrl":null,"url":null,"abstract":"A 23mW, 80MHz BW, 73dB dynamic range continuous-time ΔΣ modulator in 20nm CMOS is presented. The modulator operates from 1.0/1.2/1.5V supplies. Power is minimized by combining a low OSR, fast digital excess loop delay compensation scheme, and several techniques to minimize delay in the feedback path. The result is a highly power efficient modulator that achieves an FOM(DR) of 168dB.","PeriodicalId":381216,"journal":{"name":"2014 Symposium on VLSI Circuits Digest of Technical Papers","volume":"87 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"17","resultStr":"{\"title\":\"A 23mW, 73dB dynamic range, 80MHz BW continuous-time delta-sigma modulator in 20nm CMOS\",\"authors\":\"S. Ho, Chilun Lo, Z. Ru, Jialin Zhao\",\"doi\":\"10.1109/VLSIC.2014.6858396\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 23mW, 80MHz BW, 73dB dynamic range continuous-time ΔΣ modulator in 20nm CMOS is presented. The modulator operates from 1.0/1.2/1.5V supplies. Power is minimized by combining a low OSR, fast digital excess loop delay compensation scheme, and several techniques to minimize delay in the feedback path. The result is a highly power efficient modulator that achieves an FOM(DR) of 168dB.\",\"PeriodicalId\":381216,\"journal\":{\"name\":\"2014 Symposium on VLSI Circuits Digest of Technical Papers\",\"volume\":\"87 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-06-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"17\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 Symposium on VLSI Circuits Digest of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIC.2014.6858396\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 Symposium on VLSI Circuits Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2014.6858396","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 17

摘要

提出了一种20nm CMOS的23mW、80MHz BW、73dB动态范围连续时间ΔΣ调制器。调制器从1.0/1.2/1.5V电源工作。通过结合低OSR、快速数字过量环路延迟补偿方案和几种最小化反馈路径延迟的技术来最小化功率。结果是一个高功率效率的调制器，实现了168dB的FOM(DR)。

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A 23mW, 73dB dynamic range, 80MHz BW continuous-time delta-sigma modulator in 20nm CMOS

A 23mW, 80MHz BW, 73dB dynamic range continuous-time ΔΣ modulator in 20nm CMOS is presented. The modulator operates from 1.0/1.2/1.5V supplies. Power is minimized by combining a low OSR, fast digital excess loop delay compensation scheme, and several techniques to minimize delay in the feedback path. The result is a highly power efficient modulator that achieves an FOM(DR) of 168dB.

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2014 Symposium on VLSI Circuits Digest of Technical Papers

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