Priyanka Saha, S. Sarkhel, Pritha Banerjee, S. Sarkar
{"title":"基于3D建模的SiO2/HfO2堆叠栅极氧化物晶体管性能分析","authors":"Priyanka Saha, S. Sarkhel, Pritha Banerjee, S. Sarkar","doi":"10.1109/CONECCT.2018.8482379","DOIUrl":null,"url":null,"abstract":"This paper aims to develop a physics based 3Danalytical modeling of potential prof ile and electric field distribution of a newly proposed dual material trigate (DMTG) Silicon On Nothing (SON) TFET with SiO2/HfO2 stacked gate oxide to reap the dual benefits of gate material and dielectric engineering techniques. Based on the derived electric field, drain current is obtained using Kane’s tunneling model. An overall comparative performance analysis of the present structure is done to establish the functional efficiency of the model over its SMTG equivalent in terms of surface potential, electric field, ON current and ambipolar conduction. The analytical results obtained are verified with 3DATLAS device simulator data to substantiate the accuracy of the derived model.","PeriodicalId":430389,"journal":{"name":"2018 IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT)","volume":"49 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-03-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"3D Modeling based Performance Analysis of Gate Engineered Trigate SON TFET with SiO2/HfO2 stacked gate oxide\",\"authors\":\"Priyanka Saha, S. Sarkhel, Pritha Banerjee, S. Sarkar\",\"doi\":\"10.1109/CONECCT.2018.8482379\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper aims to develop a physics based 3Danalytical modeling of potential prof ile and electric field distribution of a newly proposed dual material trigate (DMTG) Silicon On Nothing (SON) TFET with SiO2/HfO2 stacked gate oxide to reap the dual benefits of gate material and dielectric engineering techniques. Based on the derived electric field, drain current is obtained using Kane’s tunneling model. An overall comparative performance analysis of the present structure is done to establish the functional efficiency of the model over its SMTG equivalent in terms of surface potential, electric field, ON current and ambipolar conduction. The analytical results obtained are verified with 3DATLAS device simulator data to substantiate the accuracy of the derived model.\",\"PeriodicalId\":430389,\"journal\":{\"name\":\"2018 IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT)\",\"volume\":\"49 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-03-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CONECCT.2018.8482379\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CONECCT.2018.8482379","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
3D Modeling based Performance Analysis of Gate Engineered Trigate SON TFET with SiO2/HfO2 stacked gate oxide
This paper aims to develop a physics based 3Danalytical modeling of potential prof ile and electric field distribution of a newly proposed dual material trigate (DMTG) Silicon On Nothing (SON) TFET with SiO2/HfO2 stacked gate oxide to reap the dual benefits of gate material and dielectric engineering techniques. Based on the derived electric field, drain current is obtained using Kane’s tunneling model. An overall comparative performance analysis of the present structure is done to establish the functional efficiency of the model over its SMTG equivalent in terms of surface potential, electric field, ON current and ambipolar conduction. The analytical results obtained are verified with 3DATLAS device simulator data to substantiate the accuracy of the derived model.
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