The design of 8-bit CMOS digital to analog converter

This paper describes a high-speed current switching CMOS digital analog converter (DAC) circuit that achieves 8-bit resolution, low differential nonlinearity (DNL), 20M samples per second conversion rate, low glitch energy and 5 V power supply voltage by using the MOSIS SCNA20 2 /spl mu/m process. The converter is based on current division by using a segmentation technique. The current switching is used instead of voltage switching because current can be switched in and out of a circuit faster than voltage. The developed DAC employs two internal DACs. Each internal DAC has its own advantages. This DAC used thermometer code for three bit MSBs and R2R ladder for 5 bit LSBs.