{"title":"片上多处理器系统的一种新的软硬件协同设计方法","authors":"Iulian Nita, V. Lazarescu, R. Constantinescu","doi":"10.1109/ISSCS.2009.5206089","DOIUrl":null,"url":null,"abstract":"Our goal in this paper is to simulate the behavior of multiprocessor system on chip. We used an open virtual platform - OVPSim made by Imperas Company, which offers the possibility of programming and running application on the platforms architectures. With this platform we simulated both hardware architectures and running software applications. We used two types of processors - ARM7 IP core and MIPS32 IP core, shared memory, local memory and BUS for interconnections and simulated three systems on chip models and for each architecture we simulated the running of the same applications.","PeriodicalId":277587,"journal":{"name":"2009 International Symposium on Signals, Circuits and Systems","volume":"29 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"A new Hw/Sw co-design method for multiprocessor system on chip applications\",\"authors\":\"Iulian Nita, V. Lazarescu, R. Constantinescu\",\"doi\":\"10.1109/ISSCS.2009.5206089\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Our goal in this paper is to simulate the behavior of multiprocessor system on chip. We used an open virtual platform - OVPSim made by Imperas Company, which offers the possibility of programming and running application on the platforms architectures. With this platform we simulated both hardware architectures and running software applications. We used two types of processors - ARM7 IP core and MIPS32 IP core, shared memory, local memory and BUS for interconnections and simulated three systems on chip models and for each architecture we simulated the running of the same applications.\",\"PeriodicalId\":277587,\"journal\":{\"name\":\"2009 International Symposium on Signals, Circuits and Systems\",\"volume\":\"29 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-07-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 International Symposium on Signals, Circuits and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCS.2009.5206089\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 International Symposium on Signals, Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCS.2009.5206089","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A new Hw/Sw co-design method for multiprocessor system on chip applications
Our goal in this paper is to simulate the behavior of multiprocessor system on chip. We used an open virtual platform - OVPSim made by Imperas Company, which offers the possibility of programming and running application on the platforms architectures. With this platform we simulated both hardware architectures and running software applications. We used two types of processors - ARM7 IP core and MIPS32 IP core, shared memory, local memory and BUS for interconnections and simulated three systems on chip models and for each architecture we simulated the running of the same applications.