{"title":"分布式系统中的缓存","authors":"V. Milutinovic","doi":"10.1109/MCC.2000.865887","DOIUrl":null,"url":null,"abstract":"Modern computer systems, as well as the Internet, use caching to maximize their efficiency. Nowadays, caching occurs in many different system layers. Analysis of these layers will lead to a deeper understanding of cache performance. ... comes from the uniprocessor environment. Spatial locality implies that the next data item in the address space is most likely to be used next, while temporal locality implies that the last data item used is most likely to be used next. Implementation is typically based on a fast but expensive memory (the price is affordable because, by definition, cache memory is small). Even if we use the same technology for the main memory and cache memory, the cache memory will be faster because smaller memories have a shorter access time. Recent research tries to split the CPU cache into two subcaches: one for spatial locality and one for temporal locality. # SMP On the SMP level, spatial and temporal","PeriodicalId":282630,"journal":{"name":"IEEE Concurr.","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"17","resultStr":"{\"title\":\"Caching in distributed systems\",\"authors\":\"V. Milutinovic\",\"doi\":\"10.1109/MCC.2000.865887\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Modern computer systems, as well as the Internet, use caching to maximize their efficiency. Nowadays, caching occurs in many different system layers. Analysis of these layers will lead to a deeper understanding of cache performance. ... comes from the uniprocessor environment. Spatial locality implies that the next data item in the address space is most likely to be used next, while temporal locality implies that the last data item used is most likely to be used next. Implementation is typically based on a fast but expensive memory (the price is affordable because, by definition, cache memory is small). Even if we use the same technology for the main memory and cache memory, the cache memory will be faster because smaller memories have a shorter access time. Recent research tries to split the CPU cache into two subcaches: one for spatial locality and one for temporal locality. # SMP On the SMP level, spatial and temporal\",\"PeriodicalId\":282630,\"journal\":{\"name\":\"IEEE Concurr.\",\"volume\":\"15 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-07-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"17\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Concurr.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MCC.2000.865887\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Concurr.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MCC.2000.865887","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Modern computer systems, as well as the Internet, use caching to maximize their efficiency. Nowadays, caching occurs in many different system layers. Analysis of these layers will lead to a deeper understanding of cache performance. ... comes from the uniprocessor environment. Spatial locality implies that the next data item in the address space is most likely to be used next, while temporal locality implies that the last data item used is most likely to be used next. Implementation is typically based on a fast but expensive memory (the price is affordable because, by definition, cache memory is small). Even if we use the same technology for the main memory and cache memory, the cache memory will be faster because smaller memories have a shorter access time. Recent research tries to split the CPU cache into two subcaches: one for spatial locality and one for temporal locality. # SMP On the SMP level, spatial and temporal