Relative debugging is a powerful paradigm that lets us locate errors in programs that result from porting or rewriting code. The authors describe their experience using relative debugging to compare a program written in a sequential language with one that was ported to the data-parallel language ZPL.
{"title":"Relative debugging for data-parallel programs: a ZPL case study","authors":"Greg Watson, D. Abramson","doi":"10.1109/4434.895105","DOIUrl":"https://doi.org/10.1109/4434.895105","url":null,"abstract":"Relative debugging is a powerful paradigm that lets us locate errors in programs that result from porting or rewriting code. The authors describe their experience using relative debugging to compare a program written in a sequential language with one that was ported to the data-parallel language ZPL.","PeriodicalId":282630,"journal":{"name":"IEEE Concurr.","volume":"450 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122826373","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Computer system architectures have always evolved over time, but we are currently witnessing an especially dramatic paradigm shift in computer system design. The Internet has shifted the distributed computing paradigm from the traditional closely coupled form to a loosely coupled one.
{"title":"Network computers: the changing face of computing","authors":"I. Ahmad","doi":"10.1109/4434.895097","DOIUrl":"https://doi.org/10.1109/4434.895097","url":null,"abstract":"Computer system architectures have always evolved over time, but we are currently witnessing an especially dramatic paradigm shift in computer system design. The Internet has shifted the distributed computing paradigm from the traditional closely coupled form to a loosely coupled one.","PeriodicalId":282630,"journal":{"name":"IEEE Concurr.","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116429292","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The last four years have seen an explosion in the concern for information security. People are becoming aware of how much information is publicly available, as stories in the national news media discuss the ease with which hackers steal identities. On a less personal note, compromises of information involving authorized access show that organizations have information security problems. With this awareness has grown an understanding of our dependence on accurate, confidential information, and of the fragility of the infrastructure we use to secure that information. Of all the questions emerging, the fundamental one is this: how can we secure information? This essay discusses different forms of education that are relevant to this problem.
{"title":"Education in information security","authors":"M. Bishop","doi":"10.1109/4434.895087","DOIUrl":"https://doi.org/10.1109/4434.895087","url":null,"abstract":"The last four years have seen an explosion in the concern for information security. People are becoming aware of how much information is publicly available, as stories in the national news media discuss the ease with which hackers steal identities. On a less personal note, compromises of information involving authorized access show that organizations have information security problems. With this awareness has grown an understanding of our dependence on accurate, confidential information, and of the fragility of the infrastructure we use to secure that information. Of all the questions emerging, the fundamental one is this: how can we secure information? This essay discusses different forms of education that are relevant to this problem.","PeriodicalId":282630,"journal":{"name":"IEEE Concurr.","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122551863","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The author describes how Hewlett-Packard implemented C++ exception handling in its IA-64 processor architecture. Researchers at the IA-64 Foundation Laboratory studied the performance impact of various solutions before finding a solution that leaves room for future optimizations.
作者描述了惠普如何在其IA-64处理器体系结构中实现c++异常处理。IA-64 Foundation Laboratory的研究人员研究了各种解决方案对性能的影响，然后找到了一个为未来优化留下空间的解决方案。
{"title":"C++ exception handling","authors":"Christophe de Dinechin","doi":"10.1109/4434.895109","DOIUrl":"https://doi.org/10.1109/4434.895109","url":null,"abstract":"The author describes how Hewlett-Packard implemented C++ exception handling in its IA-64 processor architecture. Researchers at the IA-64 Foundation Laboratory studied the performance impact of various solutions before finding a solution that leaves room for future optimizations.","PeriodicalId":282630,"journal":{"name":"IEEE Concurr.","volume":"23 3","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113978952","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
HP Caliper, a framework for building dynamic instrumentation tools, lets you change program instructions on-the-fly with instrumentation probes. It offers a common framework for building performance analysis tools that can integrate hardware-supported performance measurement unit (PMU) sampling with dynamic instrumentation. This article describes Caliper's architecture, its public interfaces and its dynamic instrumentation algorithm.
HP Caliper是一个用于构建动态仪器工具的框架，它允许您使用仪器探头实时更改程序指令。它为构建性能分析工具提供了一个通用框架，可以将硬件支持的性能测量单元(PMU)采样与动态仪器集成在一起。本文描述了Caliper的体系结构、公共接口和动态检测算法。
{"title":"HP Caliper: a framework for performance analysis tools","authors":"R. Hundt","doi":"10.1109/4434.895108","DOIUrl":"https://doi.org/10.1109/4434.895108","url":null,"abstract":"HP Caliper, a framework for building dynamic instrumentation tools, lets you change program instructions on-the-fly with instrumentation probes. It offers a common framework for building performance analysis tools that can integrate hardware-supported performance measurement unit (PMU) sampling with dynamic instrumentation. This article describes Caliper's architecture, its public interfaces and its dynamic instrumentation algorithm.","PeriodicalId":282630,"journal":{"name":"IEEE Concurr.","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124930929","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The authors explain the test results they achieved in developing an experimental software tool called CASCH (Computer-Aided SCHeduling). This system provides a unified environment for performing automatic parallelization and scheduling of applications without relying on simulations.
{"title":"CASCH: a tool for computer-aided scheduling","authors":"I. Ahmad, Yu-Kwong Kwok, Minyou Wu, W. Shu","doi":"10.1109/4434.895101","DOIUrl":"https://doi.org/10.1109/4434.895101","url":null,"abstract":"The authors explain the test results they achieved in developing an experimental software tool called CASCH (Computer-Aided SCHeduling). This system provides a unified environment for performing automatic parallelization and scheduling of applications without relying on simulations.","PeriodicalId":282630,"journal":{"name":"IEEE Concurr.","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130326865","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Shubhendu S. Mukherjee, S. Reinhardt, B. Falsafi, M. Litzkow, M. Hill, D. Wood, S. Huss-Lederman, J. Larus
To analyze new parallel computers, developers must rapidly simulate designs running realistic workloads. Historically, direct execution and a parallel host have accelerated simulations, although these techniques have typically lacked portability. Through four key operations, the Wisconsin Wind Tunnel II can easily run simulations on Sparc platforms ranging from a workstation cluster to an asymmetric multiprocessor.
{"title":"Wisconsin Wind Tunnel II: a fast, portable parallel architecture simulator","authors":"Shubhendu S. Mukherjee, S. Reinhardt, B. Falsafi, M. Litzkow, M. Hill, D. Wood, S. Huss-Lederman, J. Larus","doi":"10.1109/4434.895100","DOIUrl":"https://doi.org/10.1109/4434.895100","url":null,"abstract":"To analyze new parallel computers, developers must rapidly simulate designs running realistic workloads. Historically, direct execution and a parallel host have accelerated simulations, although these techniques have typically lacked portability. Through four key operations, the Wisconsin Wind Tunnel II can easily run simulations on Sparc platforms ranging from a workstation cluster to an asymmetric multiprocessor.","PeriodicalId":282630,"journal":{"name":"IEEE Concurr.","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115324058","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Controller development using data-flow models can be both complex and time-consuming. Object-oriented technology, however, can help simplify the development, maintenance and reuse of applications for manufacturing and process control, just as it has helped simplify the development, maintenance and reuse of other applications. The Java Devices for Process Control (JDPC) Project, which operates at the University of Catania, is developing a field device, called the Java Microcontrolled Device (JMD), that is capable of running process control applications written in Java. The JMD runs a Java-based kernel that provides Java applications with a set of primitives which are suitable for implementing control algorithms. This article describes the JMD's architecture and functionality. Implementing the JMD represents one of the first steps toward fully incorporating Java into process control and manufacturing environments.
{"title":"A Java kernel for embedded systems in distributed process control","authors":"A. Stefano, C. Santoro","doi":"10.1109/4434.895107","DOIUrl":"https://doi.org/10.1109/4434.895107","url":null,"abstract":"Controller development using data-flow models can be both complex and time-consuming. Object-oriented technology, however, can help simplify the development, maintenance and reuse of applications for manufacturing and process control, just as it has helped simplify the development, maintenance and reuse of other applications. The Java Devices for Process Control (JDPC) Project, which operates at the University of Catania, is developing a field device, called the Java Microcontrolled Device (JMD), that is capable of running process control applications written in Java. The JMD runs a Java-based kernel that provides Java applications with a set of primitives which are suitable for implementing control algorithms. This article describes the JMD's architecture and functionality. Implementing the JMD represents one of the first steps toward fully incorporating Java into process control and manufacturing environments.","PeriodicalId":282630,"journal":{"name":"IEEE Concurr.","volume":"32 7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115815990","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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