Gyungock Kim, I. Kim, Sanghoon Kim, Jiho Joo, Ki-seok Jang, Sun Ae Kim, J. Oh, Jeong Woo Park, Myung-Joon Kwack, Jaegyu Park, Hyundai Park, Gun Sik Park, Sanggi Kim
{"title":"基于SOI/大块硅平台的芯片级光互连硅光子器件","authors":"Gyungock Kim, I. Kim, Sanghoon Kim, Jiho Joo, Ki-seok Jang, Sun Ae Kim, J. Oh, Jeong Woo Park, Myung-Joon Kwack, Jaegyu Park, Hyundai Park, Gun Sik Park, Sanggi Kim","doi":"10.1117/12.2078493","DOIUrl":null,"url":null,"abstract":"Based on either a SOI wafer or a bulk-silicon wafer, we discuss silicon photonic devices and integrations for chip-level optical interconnects. We present the low-voltage silicon PICs on a SOI wafer, where Si modulators and Ge-on-Si photodetectors are monolithically-integrated for intra-chip or inter-chip interconnects over 40 Gb/s. For future chip-level integration, the 50 Gb/s small-sized depletion-type MZ modulator with the vertically-dipped PN-depletion-junction (VDJ) is also presented. We report vertical-illumination-type Ge photodetectors on bulk-silicon wafers, with high performances up to 50 Gb/s. We present the bulk-silicon platform for practical implementation of chip-level interconnects, and the performance of the photonic transceiver silicon chip.","PeriodicalId":432115,"journal":{"name":"Photonics West - Optoelectronic Materials and Devices","volume":"118 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Silicon photonic devices based on SOI/bulk-silicon platforms for chip-level optical interconnects\",\"authors\":\"Gyungock Kim, I. Kim, Sanghoon Kim, Jiho Joo, Ki-seok Jang, Sun Ae Kim, J. Oh, Jeong Woo Park, Myung-Joon Kwack, Jaegyu Park, Hyundai Park, Gun Sik Park, Sanggi Kim\",\"doi\":\"10.1117/12.2078493\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Based on either a SOI wafer or a bulk-silicon wafer, we discuss silicon photonic devices and integrations for chip-level optical interconnects. We present the low-voltage silicon PICs on a SOI wafer, where Si modulators and Ge-on-Si photodetectors are monolithically-integrated for intra-chip or inter-chip interconnects over 40 Gb/s. For future chip-level integration, the 50 Gb/s small-sized depletion-type MZ modulator with the vertically-dipped PN-depletion-junction (VDJ) is also presented. We report vertical-illumination-type Ge photodetectors on bulk-silicon wafers, with high performances up to 50 Gb/s. We present the bulk-silicon platform for practical implementation of chip-level interconnects, and the performance of the photonic transceiver silicon chip.\",\"PeriodicalId\":432115,\"journal\":{\"name\":\"Photonics West - Optoelectronic Materials and Devices\",\"volume\":\"118 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-04-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Photonics West - Optoelectronic Materials and Devices\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1117/12.2078493\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Photonics West - Optoelectronic Materials and Devices","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1117/12.2078493","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Silicon photonic devices based on SOI/bulk-silicon platforms for chip-level optical interconnects
Based on either a SOI wafer or a bulk-silicon wafer, we discuss silicon photonic devices and integrations for chip-level optical interconnects. We present the low-voltage silicon PICs on a SOI wafer, where Si modulators and Ge-on-Si photodetectors are monolithically-integrated for intra-chip or inter-chip interconnects over 40 Gb/s. For future chip-level integration, the 50 Gb/s small-sized depletion-type MZ modulator with the vertically-dipped PN-depletion-junction (VDJ) is also presented. We report vertical-illumination-type Ge photodetectors on bulk-silicon wafers, with high performances up to 50 Gb/s. We present the bulk-silicon platform for practical implementation of chip-level interconnects, and the performance of the photonic transceiver silicon chip.