{"title":"矩形二值化图形的自动生成(IC平面规划)","authors":"M. Jabri","doi":"10.1109/DAC.1988.14832","DOIUrl":null,"url":null,"abstract":"Rectangular dualisation is used to generate rectangular topologies in top-down floorplanning of integrated circuits. The author presents an efficient algorithm that transforms an arbitrary graph, representing a custom integrated circuit into one suitable for rectangular dualisation. The algorithm uses efficient techniques in graph processing, such as planar embedding, and introduces a novel procedure to transform a tree of biconnected subgraphs into a block neighborhood graph that is a path.<<ETX>>","PeriodicalId":230716,"journal":{"name":"25th ACM/IEEE, Design Automation Conference.Proceedings 1988.","volume":"153 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1988-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Automatic building of graphs for rectangular dualisation (IC floorplanning)\",\"authors\":\"M. Jabri\",\"doi\":\"10.1109/DAC.1988.14832\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Rectangular dualisation is used to generate rectangular topologies in top-down floorplanning of integrated circuits. The author presents an efficient algorithm that transforms an arbitrary graph, representing a custom integrated circuit into one suitable for rectangular dualisation. The algorithm uses efficient techniques in graph processing, such as planar embedding, and introduces a novel procedure to transform a tree of biconnected subgraphs into a block neighborhood graph that is a path.<<ETX>>\",\"PeriodicalId\":230716,\"journal\":{\"name\":\"25th ACM/IEEE, Design Automation Conference.Proceedings 1988.\",\"volume\":\"153 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1988-06-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"25th ACM/IEEE, Design Automation Conference.Proceedings 1988.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DAC.1988.14832\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"25th ACM/IEEE, Design Automation Conference.Proceedings 1988.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DAC.1988.14832","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Automatic building of graphs for rectangular dualisation (IC floorplanning)
Rectangular dualisation is used to generate rectangular topologies in top-down floorplanning of integrated circuits. The author presents an efficient algorithm that transforms an arbitrary graph, representing a custom integrated circuit into one suitable for rectangular dualisation. The algorithm uses efficient techniques in graph processing, such as planar embedding, and introduces a novel procedure to transform a tree of biconnected subgraphs into a block neighborhood graph that is a path.<>
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