Yi-Hsuan Fan, Jyi-Tsong Lin, Y. Eng, Yu-Che Chang, Cheng-Hsin Chen, Kuan-Yu Lu, Chih-Hsuan Tai
{"title":"新型双通道体系MOSFET的仿真研究","authors":"Yi-Hsuan Fan, Jyi-Tsong Lin, Y. Eng, Yu-Che Chang, Cheng-Hsin Chen, Kuan-Yu Lu, Chih-Hsuan Tai","doi":"10.1109/IWJT.2010.5474898","DOIUrl":null,"url":null,"abstract":"In this work, a novel device called dual-channel body-tied (DCBT) MOSFET is proposed. According to numerical simulations, the DCBT MOSFET can reduce the lattice temperature about 51.6% in top and 53.8% in bottom channel, respectively, while maintain the desirable short-channel characteristics, compared with the conventional non-body-tied DC structure.","PeriodicalId":205070,"journal":{"name":"2010 International Workshop on Junction Technology Extended Abstracts","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A simulation study of a novel dual-channel body-tied MOSFET\",\"authors\":\"Yi-Hsuan Fan, Jyi-Tsong Lin, Y. Eng, Yu-Che Chang, Cheng-Hsin Chen, Kuan-Yu Lu, Chih-Hsuan Tai\",\"doi\":\"10.1109/IWJT.2010.5474898\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this work, a novel device called dual-channel body-tied (DCBT) MOSFET is proposed. According to numerical simulations, the DCBT MOSFET can reduce the lattice temperature about 51.6% in top and 53.8% in bottom channel, respectively, while maintain the desirable short-channel characteristics, compared with the conventional non-body-tied DC structure.\",\"PeriodicalId\":205070,\"journal\":{\"name\":\"2010 International Workshop on Junction Technology Extended Abstracts\",\"volume\":\"13 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-05-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 International Workshop on Junction Technology Extended Abstracts\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IWJT.2010.5474898\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 International Workshop on Junction Technology Extended Abstracts","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWJT.2010.5474898","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A simulation study of a novel dual-channel body-tied MOSFET
In this work, a novel device called dual-channel body-tied (DCBT) MOSFET is proposed. According to numerical simulations, the DCBT MOSFET can reduce the lattice temperature about 51.6% in top and 53.8% in bottom channel, respectively, while maintain the desirable short-channel characteristics, compared with the conventional non-body-tied DC structure.