{"title":"数字硬件实现的一种用于分类的神经网络","authors":"H. Faiedh, Z. Gafsi, K. Torki, K. Besbes","doi":"10.1109/ICM.2004.1434722","DOIUrl":null,"url":null,"abstract":"In this paper, we propose a fully digital hardware implementation of neural networks. We describe the functioning of a digital artificial neuron and we propose a general architecture of a generic neural network. An example of a static neural network is given to show the efficiency of the implementation.","PeriodicalId":359193,"journal":{"name":"Proceedings. The 16th International Conference on Microelectronics, 2004. ICM 2004.","volume":"20 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"17","resultStr":"{\"title\":\"Digital hardware implementation of a neural network used for classification\",\"authors\":\"H. Faiedh, Z. Gafsi, K. Torki, K. Besbes\",\"doi\":\"10.1109/ICM.2004.1434722\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we propose a fully digital hardware implementation of neural networks. We describe the functioning of a digital artificial neuron and we propose a general architecture of a generic neural network. An example of a static neural network is given to show the efficiency of the implementation.\",\"PeriodicalId\":359193,\"journal\":{\"name\":\"Proceedings. The 16th International Conference on Microelectronics, 2004. ICM 2004.\",\"volume\":\"20 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-12-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"17\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. The 16th International Conference on Microelectronics, 2004. ICM 2004.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICM.2004.1434722\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. The 16th International Conference on Microelectronics, 2004. ICM 2004.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICM.2004.1434722","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Digital hardware implementation of a neural network used for classification
In this paper, we propose a fully digital hardware implementation of neural networks. We describe the functioning of a digital artificial neuron and we propose a general architecture of a generic neural network. An example of a static neural network is given to show the efficiency of the implementation.
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