{"title":"两种基于mtj的内容可寻址非易失性存储单元的设计与评价","authors":"Ke Chen, Jie Han, F. Lombardi","doi":"10.1109/NANO.2013.6720805","DOIUrl":null,"url":null,"abstract":"This paper proposes two non-volatile content addressable memory (CAM) cells using magnetic tunneling junction (MTJ) devices and nanoscaled CMOS transistors. The first novelty of the proposed non-volatile cells is that their operation and comparison outcome are voltage-based, hence requiring no current sensor. Two types of MTJ CAM cell are proposed; each of them utilizes two MTJs in a voltage divider arrangement. They differ in the number of required transistors, i.e. the first is a NOR type cell requiring six MOSFETs, while the second is a NAND type cell requiring five MOSFETs. Performance metrics (as related to search delay, power dissipation and static noise margin) as well as variation to process, voltage and temperature (PVT) are assessed by simulation at different feature sizes of the MOSFETs. The simulation results show that the proposed designs significantly improve in terms of search delay and power delay product (PDP) over existing non-volatile CAM memory cells utilizing MTJs.","PeriodicalId":189707,"journal":{"name":"2013 13th IEEE International Conference on Nanotechnology (IEEE-NANO 2013)","volume":"209 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"Design and evaluation of two MTJ-based content addressable non-volatile memory cells\",\"authors\":\"Ke Chen, Jie Han, F. Lombardi\",\"doi\":\"10.1109/NANO.2013.6720805\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper proposes two non-volatile content addressable memory (CAM) cells using magnetic tunneling junction (MTJ) devices and nanoscaled CMOS transistors. The first novelty of the proposed non-volatile cells is that their operation and comparison outcome are voltage-based, hence requiring no current sensor. Two types of MTJ CAM cell are proposed; each of them utilizes two MTJs in a voltage divider arrangement. They differ in the number of required transistors, i.e. the first is a NOR type cell requiring six MOSFETs, while the second is a NAND type cell requiring five MOSFETs. Performance metrics (as related to search delay, power dissipation and static noise margin) as well as variation to process, voltage and temperature (PVT) are assessed by simulation at different feature sizes of the MOSFETs. The simulation results show that the proposed designs significantly improve in terms of search delay and power delay product (PDP) over existing non-volatile CAM memory cells utilizing MTJs.\",\"PeriodicalId\":189707,\"journal\":{\"name\":\"2013 13th IEEE International Conference on Nanotechnology (IEEE-NANO 2013)\",\"volume\":\"209 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 13th IEEE International Conference on Nanotechnology (IEEE-NANO 2013)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NANO.2013.6720805\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 13th IEEE International Conference on Nanotechnology (IEEE-NANO 2013)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NANO.2013.6720805","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design and evaluation of two MTJ-based content addressable non-volatile memory cells
This paper proposes two non-volatile content addressable memory (CAM) cells using magnetic tunneling junction (MTJ) devices and nanoscaled CMOS transistors. The first novelty of the proposed non-volatile cells is that their operation and comparison outcome are voltage-based, hence requiring no current sensor. Two types of MTJ CAM cell are proposed; each of them utilizes two MTJs in a voltage divider arrangement. They differ in the number of required transistors, i.e. the first is a NOR type cell requiring six MOSFETs, while the second is a NAND type cell requiring five MOSFETs. Performance metrics (as related to search delay, power dissipation and static noise margin) as well as variation to process, voltage and temperature (PVT) are assessed by simulation at different feature sizes of the MOSFETs. The simulation results show that the proposed designs significantly improve in terms of search delay and power delay product (PDP) over existing non-volatile CAM memory cells utilizing MTJs.