一种基于1.2 v 180 nm CMOS低功耗多波段环形振荡器的频率合成器,用于边合发射机

Markus Stadelmayer, Tim Schumacher, Thomas Faseth, H. Pretl
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引用次数: 2

摘要

介绍了一种基于锁相环(PLL)调节的八级差动环振荡器(RO)的宽频域低功耗合成器。它是专门设计用于边组合发射机,并在180nm 1P6M CMOS工艺制造。它提供16个对称相移输出,使用外部边组合器可实现高达8倍的倍频。该振荡器被实现为缺流RO。它包括一个偏置网络,具有接近50%占空比的阈值调节和所有RO阶段的等时延。低角频率为5位可调(50MHz至300 MHz),振荡器提供额外的5位可调调谐范围(20.3MHz至97.2 MHz)。该结构经过优化,工作频率为216MHz,在1MHz偏置时相位噪声为- 96 dBc/Hz,带内相位噪声为- 76 dBc/Hz(锁相环低于100khz偏置)。该频率合成器功率需求低,仅为1.3mW,适用于低功率发射机。
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A 1.2-V 180-nm CMOS Low-Power Multi-Band Ring Oscillator based Frequency Synthesizer for Edge-Combining Transmitters
A wide-frequency-range low-power synthesizer based on an eight-stage differential ring oscillator (RO) regulated by a phase locked loop (PLL) is introduced. It is specially designed to be used in edge-combining transmitters and fabricated in a 180nm 1P6M CMOS process. It provides 16 symmetrical phase-shifted outputs for up to 8-times frequency-multiplication using an external edge-combiner. The oscillator is implemented as current-starved RO. It includes a biasing network with threshold regulation for close to 50% duty cycle and equal time delay in all RO stages. The lower corner-frequency is 5 bit adjustable (50MHz to 300 MHz) and the oscillator offers an additional 5 bit trimmable tuning range (20.3MHz to 97.2 MHz). The structure is optimized to operate at 216MHz and shows a phase noise of −96 dBc/Hz at 1MHz offset as well as −76 dBc/Hz in-band phase noise (with locked PLL below 100 kHz offset). With its low power demand of 1.3mW, the frequency synthesizer is suited to be used in low-power transmitters.
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