用于低压流水线A/D转换器的1 v仅mosfet全差分动态比较器

R. Lotfi, M. Taherzadeh‐Sani, M. Azizi, O. Shoaei
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引用次数: 25

摘要

在标准数字过程中实现的低压低功耗比较器在不同的集成应用中越来越重要。本文提出了一种具有轨对轨输入摆幅的1 v全差分低功率mosfet比较器,可适用于极低压低功率流水线a /D转换器。该比较器采用带mosfet时钟升压器的阻性分压器配置,在要进行比较的间隔内为动态锁存器提供更高的电压。在0.25 μm CMOS工艺中对该比较器进行了HSPICE仿真,验证了该全差分比较器在驱动0.2pF容性负载时,在电源电压为1 V、决策时间小于1 ns的轨对轨输入范围。在时钟频率为50MHz的情况下,该比较器的最坏动态功耗小于100μW。
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A 1-V MOSFET-only fully-differential dynamic comparator for use in low-voltage pipelined A/D converters
Low-voltage low-power comparators implemented in standard digital processes are of increasing importance in different integrated applications. In this paper a 1-V fully-differential low-power MOSFET-only comparator with rail-to-rail input swing is presented which can be suitably used in very low-voltage low-power pipelined A/D converters. This comparator utilizes a resistive divider configuration with a MOSFET-only clock booster to supply a higher voltage for the dynamic latch in the intervals that a comparison is to be made. HSPICE simulations of the proposed comparator in a 0.25-μm CMOS process, confirm the rail-to-rail input range of the fully-differential comparator with a supply voltage of 1 V with a decision time of less than 1 ns while driving a capacitive load of 0.2pF. The worst-case dynamic power consumption of the proposed comparator is less than 100μW with a clock frequency of 50MHz.
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