{"title":"MAXware: HPC加速","authors":"R. Dimond, M. J. Flynn, O. Mencer, O. Pell","doi":"10.1109/HOTCHIPS.2008.7476552","DOIUrl":null,"url":null,"abstract":"This article consists of a collection of slides from the authors' conference presentation. Acceleration based speedup using structured arrays. More attention to memory and/or arithmetic: data representation, streaming, and RAM. •Lower power with non aggressive frequency use. Programming uses cylindrical model; but speedup requires lots of low level program optimization. Good tools are golden.","PeriodicalId":134939,"journal":{"name":"2008 IEEE Hot Chips 20 Symposium (HCS)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"MAXware: Acceleration in HPC\",\"authors\":\"R. Dimond, M. J. Flynn, O. Mencer, O. Pell\",\"doi\":\"10.1109/HOTCHIPS.2008.7476552\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This article consists of a collection of slides from the authors' conference presentation. Acceleration based speedup using structured arrays. More attention to memory and/or arithmetic: data representation, streaming, and RAM. •Lower power with non aggressive frequency use. Programming uses cylindrical model; but speedup requires lots of low level program optimization. Good tools are golden.\",\"PeriodicalId\":134939,\"journal\":{\"name\":\"2008 IEEE Hot Chips 20 Symposium (HCS)\",\"volume\":\"11 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 IEEE Hot Chips 20 Symposium (HCS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/HOTCHIPS.2008.7476552\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 IEEE Hot Chips 20 Symposium (HCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HOTCHIPS.2008.7476552","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This article consists of a collection of slides from the authors' conference presentation. Acceleration based speedup using structured arrays. More attention to memory and/or arithmetic: data representation, streaming, and RAM. •Lower power with non aggressive frequency use. Programming uses cylindrical model; but speedup requires lots of low level program optimization. Good tools are golden.
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
