非对称信道中使用系统无序码降低数据保护错误率的研究

S. Piestrak
{"title":"非对称信道中使用系统无序码降低数据保护错误率的研究","authors":"S. Piestrak","doi":"10.1109/DSD.2010.117","DOIUrl":null,"url":null,"abstract":"Berger-invert codes are coding schemes used to protect communication channels against all asymmetric errors and to decrease power consumption. This paper proposes a method of constructing modified Berger-invert codes that relies on the choice of check parts with the smallest possible total weight and assignment of low-weight check parts to the most numerous subsets of data with the largest Hamming weights. As a result, the error rate of the transmitted data can be reduced by up to about 23.5% for a 8-bit bus at no cost (no extra bus lines or increase of hardware to implement encoding and decoding/checking circuitry).","PeriodicalId":356885,"journal":{"name":"2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"On Reducing Error Rate of Data Protected Using Systematic Unordered Codes in Asymmetric Channels\",\"authors\":\"S. Piestrak\",\"doi\":\"10.1109/DSD.2010.117\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Berger-invert codes are coding schemes used to protect communication channels against all asymmetric errors and to decrease power consumption. This paper proposes a method of constructing modified Berger-invert codes that relies on the choice of check parts with the smallest possible total weight and assignment of low-weight check parts to the most numerous subsets of data with the largest Hamming weights. As a result, the error rate of the transmitted data can be reduced by up to about 23.5% for a 8-bit bus at no cost (no extra bus lines or increase of hardware to implement encoding and decoding/checking circuitry).\",\"PeriodicalId\":356885,\"journal\":{\"name\":\"2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools\",\"volume\":\"39 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DSD.2010.117\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DSD.2010.117","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

摘要

伯杰反码是一种用于保护通信信道免受所有非对称错误和降低功耗的编码方案。本文提出了一种构造改进的berger -反转码的方法,该方法依赖于选择具有尽可能小的总权值的校验部分,并将低权值的校验部分分配给具有最大汉明权值的最多的数据子集。因此,对于8位总线,传输数据的错误率可以降低约23.5%,而无需成本(不需要额外的总线线路或增加硬件来实现编码和解码/检查电路)。
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On Reducing Error Rate of Data Protected Using Systematic Unordered Codes in Asymmetric Channels
Berger-invert codes are coding schemes used to protect communication channels against all asymmetric errors and to decrease power consumption. This paper proposes a method of constructing modified Berger-invert codes that relies on the choice of check parts with the smallest possible total weight and assignment of low-weight check parts to the most numerous subsets of data with the largest Hamming weights. As a result, the error rate of the transmitted data can be reduced by up to about 23.5% for a 8-bit bus at no cost (no extra bus lines or increase of hardware to implement encoding and decoding/checking circuitry).
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