Notice of Violation of IEEE Publication PrinciplesA Dual Channel DVB-S/S2 Direct-Conversion Satellite TV Tuner with On-Chip ADCs and Multiple DC Offset Cancellation Loops

This paper proposes a dual channel satellite TV receiver using an alternative partition into a front-end RF-todigital tuner that includes the baseband ADC converters and a digital-only demodulator-on-host, resulting in a low cost and a good isolation between the analog front-end and the digital backend. The die area was significantly reduced by replacing the multi-oscillator solution used at present with a single high frequency Colpitts oscillator, followed by a ratiometric frequency divider that generates the local oscillator signals for the entire satellite TV L-band. VCO pulling was reduced by having a larger frequency offset between the two PLLs, while the ADC spurs were avoided by performing a dynamic clock frequency management. The DC offset cancellation loop capacitors were integrated onchip by combining a multiple loop architecture with Miller capacitance multiplication. Tuner specifications include: -85dBm sensitivity, <7dB noise figure, +26dBm IIP3 at minimum gain,<0.7° total integrated phase noise, 24mm2 die area and 2W power from a 3.3V supply in dual channel reception mode.