{"title":"稳压模块(VRM)暂态建模与分析","authors":"P. Wong, F. Lee, Xunwei Zhou, Jiabin Chen","doi":"10.1109/IAS.1999.805965","DOIUrl":null,"url":null,"abstract":"In this paper, the transient response of the voltage regulator module (VRM) output voltage when the processor has a sudden load change is analyzed. The parasitic parameters play important roles in the transient. The system can be divided into several resonant loops. Each loop can be considered approximately as a decoupled second order system. The voltage drop of the capacitor is analyzed. By reducing the inductance and increasing converter bandwidth, the transient of VRM can be improved.","PeriodicalId":125787,"journal":{"name":"Conference Record of the 1999 IEEE Industry Applications Conference. Thirty-Forth IAS Annual Meeting (Cat. No.99CH36370)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-10-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"33","resultStr":"{\"title\":\"Voltage regulator module (VRM) transient modeling and analysis\",\"authors\":\"P. Wong, F. Lee, Xunwei Zhou, Jiabin Chen\",\"doi\":\"10.1109/IAS.1999.805965\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, the transient response of the voltage regulator module (VRM) output voltage when the processor has a sudden load change is analyzed. The parasitic parameters play important roles in the transient. The system can be divided into several resonant loops. Each loop can be considered approximately as a decoupled second order system. The voltage drop of the capacitor is analyzed. By reducing the inductance and increasing converter bandwidth, the transient of VRM can be improved.\",\"PeriodicalId\":125787,\"journal\":{\"name\":\"Conference Record of the 1999 IEEE Industry Applications Conference. Thirty-Forth IAS Annual Meeting (Cat. No.99CH36370)\",\"volume\":\"7 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1999-10-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"33\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Conference Record of the 1999 IEEE Industry Applications Conference. Thirty-Forth IAS Annual Meeting (Cat. No.99CH36370)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IAS.1999.805965\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Conference Record of the 1999 IEEE Industry Applications Conference. Thirty-Forth IAS Annual Meeting (Cat. No.99CH36370)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IAS.1999.805965","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Voltage regulator module (VRM) transient modeling and analysis
In this paper, the transient response of the voltage regulator module (VRM) output voltage when the processor has a sudden load change is analyzed. The parasitic parameters play important roles in the transient. The system can be divided into several resonant loops. Each loop can be considered approximately as a decoupled second order system. The voltage drop of the capacitor is analyzed. By reducing the inductance and increasing converter bandwidth, the transient of VRM can be improved.
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