{"title":"用于集成电路实现的数字PFM控制器的体系结构","authors":"G. Capponi, P. Livreri, G. Di Blasi, F. Marino","doi":"10.1109/CIPE.2004.1428126","DOIUrl":null,"url":null,"abstract":"This paper presents a digital controller architecture oriented to IC implementation. The classical digital pulse width modulator (D-PWM), using digital analog converter (DAC), is replaced with a Sigma-Delta (/spl Sigma//spl Delta/) modulator based on pulse frequency modulator (PFM) technique. Results of an investigation from a prototype for DC-DC converter, in terms of simulated and experimental performances, are reported, together with harmonic frequency investigation. The control function design is implemented on a field programmable gate array (FPGA). As a consequence of good agreement between simulated and experimental results, the proposed architecture realizes a digital control loop with dynamic performances comparable to analog control systems.","PeriodicalId":137483,"journal":{"name":"2004 IEEE Workshop on Computers in Power Electronics, 2004. Proceedings.","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-08-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Architecture of a digital PFM controller for IC implementation\",\"authors\":\"G. Capponi, P. Livreri, G. Di Blasi, F. Marino\",\"doi\":\"10.1109/CIPE.2004.1428126\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a digital controller architecture oriented to IC implementation. The classical digital pulse width modulator (D-PWM), using digital analog converter (DAC), is replaced with a Sigma-Delta (/spl Sigma//spl Delta/) modulator based on pulse frequency modulator (PFM) technique. Results of an investigation from a prototype for DC-DC converter, in terms of simulated and experimental performances, are reported, together with harmonic frequency investigation. The control function design is implemented on a field programmable gate array (FPGA). As a consequence of good agreement between simulated and experimental results, the proposed architecture realizes a digital control loop with dynamic performances comparable to analog control systems.\",\"PeriodicalId\":137483,\"journal\":{\"name\":\"2004 IEEE Workshop on Computers in Power Electronics, 2004. Proceedings.\",\"volume\":\"24 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-08-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2004 IEEE Workshop on Computers in Power Electronics, 2004. Proceedings.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CIPE.2004.1428126\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2004 IEEE Workshop on Computers in Power Electronics, 2004. Proceedings.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CIPE.2004.1428126","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Architecture of a digital PFM controller for IC implementation
This paper presents a digital controller architecture oriented to IC implementation. The classical digital pulse width modulator (D-PWM), using digital analog converter (DAC), is replaced with a Sigma-Delta (/spl Sigma//spl Delta/) modulator based on pulse frequency modulator (PFM) technique. Results of an investigation from a prototype for DC-DC converter, in terms of simulated and experimental performances, are reported, together with harmonic frequency investigation. The control function design is implemented on a field programmable gate array (FPGA). As a consequence of good agreement between simulated and experimental results, the proposed architecture realizes a digital control loop with dynamic performances comparable to analog control systems.