{"title":"面向直流运行的电子电路全局优化","authors":"F. Durbin, M. Heydemann, J. Montaron","doi":"10.1109/ESSCIRC.1980.5468756","DOIUrl":null,"url":null,"abstract":"2 new and efficient methods of solution for the general non-linear programming problem: minimize F(x)=F(x<sub>1</sub>, x<sub>2</sub>,...x<sub>n</sub>) in the domain S:a<sub>i</sub><;x<sub>i</sub><;b<sub>i</sub> such that g(x)>;0, h(x)=0, have been implemented in the C.A.D. program ASTEC-3. As an illustration, we present the results we obtained in the D.C. operation optimization of a CMOS/SOS differential amplifier.","PeriodicalId":168272,"journal":{"name":"ESSCIRC 80: 6th European Solid State Circuits Conference","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1980-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Towards Global Optimization of Electronic Circuits for D.C. Operation\",\"authors\":\"F. Durbin, M. Heydemann, J. Montaron\",\"doi\":\"10.1109/ESSCIRC.1980.5468756\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"2 new and efficient methods of solution for the general non-linear programming problem: minimize F(x)=F(x<sub>1</sub>, x<sub>2</sub>,...x<sub>n</sub>) in the domain S:a<sub>i</sub><;x<sub>i</sub><;b<sub>i</sub> such that g(x)>;0, h(x)=0, have been implemented in the C.A.D. program ASTEC-3. As an illustration, we present the results we obtained in the D.C. operation optimization of a CMOS/SOS differential amplifier.\",\"PeriodicalId\":168272,\"journal\":{\"name\":\"ESSCIRC 80: 6th European Solid State Circuits Conference\",\"volume\":\"22 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1980-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ESSCIRC 80: 6th European Solid State Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIRC.1980.5468756\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC 80: 6th European Solid State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.1980.5468756","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Towards Global Optimization of Electronic Circuits for D.C. Operation
2 new and efficient methods of solution for the general non-linear programming problem: minimize F(x)=F(x1, x2,...xn) in the domain S:ai<;xi<;bi such that g(x)>;0, h(x)=0, have been implemented in the C.A.D. program ASTEC-3. As an illustration, we present the results we obtained in the D.C. operation optimization of a CMOS/SOS differential amplifier.
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