{"title":"一种工作频率为0.9 ~ 2.4 GHZ的可重构CMOS功率放大器","authors":"Seok-Oh Yun, Hyung-Joun Yoo","doi":"10.1109/SOCC.2006.283846","DOIUrl":null,"url":null,"abstract":"A reconfigurable CMOS power amplifier for WPAN application is designed in CMOS 0.25 mum technology. It is composed of driver stage, power stage, interstage matching, and output matching stages. Power amplifier can be operated in various frequencies by controlling interstage matching and has the characteristic at required frequencies. The proposed power amplifier has 42-57% power added efficiency and 21.8-27.5 dB gain characteristic at frequencies of 0.9-2.4 GHz with 20 dBm output power.","PeriodicalId":345714,"journal":{"name":"2006 IEEE International SOC Conference","volume":"64 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"A Reconfigurable CMOS Power Amplifier Operating from 0.9 TO 2.4 GHZ for WPAN Application\",\"authors\":\"Seok-Oh Yun, Hyung-Joun Yoo\",\"doi\":\"10.1109/SOCC.2006.283846\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A reconfigurable CMOS power amplifier for WPAN application is designed in CMOS 0.25 mum technology. It is composed of driver stage, power stage, interstage matching, and output matching stages. Power amplifier can be operated in various frequencies by controlling interstage matching and has the characteristic at required frequencies. The proposed power amplifier has 42-57% power added efficiency and 21.8-27.5 dB gain characteristic at frequencies of 0.9-2.4 GHz with 20 dBm output power.\",\"PeriodicalId\":345714,\"journal\":{\"name\":\"2006 IEEE International SOC Conference\",\"volume\":\"64 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 IEEE International SOC Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOCC.2006.283846\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE International SOC Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCC.2006.283846","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Reconfigurable CMOS Power Amplifier Operating from 0.9 TO 2.4 GHZ for WPAN Application
A reconfigurable CMOS power amplifier for WPAN application is designed in CMOS 0.25 mum technology. It is composed of driver stage, power stage, interstage matching, and output matching stages. Power amplifier can be operated in various frequencies by controlling interstage matching and has the characteristic at required frequencies. The proposed power amplifier has 42-57% power added efficiency and 21.8-27.5 dB gain characteristic at frequencies of 0.9-2.4 GHz with 20 dBm output power.
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