在商用现成的计算机上实现理想的NDN路由器

Junji Takemasa, Y. Koizumi, T. Hasegawa
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引用次数: 16

摘要

本文的目标是展示商用现货(COTS)计算机上理想的NDN转发引擎应该是什么。本文通过选择成熟的高速技术设计了一个参考转发引擎,并对目前的原型实现进行了分析,了解了其性能瓶颈。在CPU管道和指令层面的微体系结构分析表明,动态随机存取存储器(DRAM)的访问延迟是高速转发引擎的瓶颈之一。最后,设计了两种适合预取的数据包处理技术来隐藏DRAM访问延迟。基于该技术的原型机在COTS计算机上实现了每秒超过4000万个数据包的转发。
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Toward an ideal NDN router on a commercial off-the-shelf computer
The goal of the paper is to present what an ideal NDN forwarding engine on a commercial off-the-shelf (COTS) computer is supposed to be. The paper designs a reference forwarding engine by selecting well-established high-speed techniques and then analyzes state-of-the-art prototype implementation to know its performance bottleneck. The microarchitectural analysis at the level of CPU pipelines and instructions reveals that dynamic random access memory (DRAM) access latency is one of bottlenecks for high-speed forwarding engines. Finally, the paper designs two prefetch-friendly packet processing techniques to hide DRAM access latency. The prototype according to the techniques achieves more than 40 million packets per second packet forwarding on a COTS computer.
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