减少开关数量的非对称多电平混合逆变器

Babitha T. Abraham, A. Benny
{"title":"减少开关数量的非对称多电平混合逆变器","authors":"Babitha T. Abraham, A. Benny","doi":"10.1109/AICERA.2014.6908176","DOIUrl":null,"url":null,"abstract":"Multilevel Inverter is an array of power semiconductors and capacitors that allow the generation of a high quality load voltage. But it requires greater number of power semiconductor switches with increase in number of levels. In this paper, three phase hybrid topology of multilevel inverter is used to reduce the number of switching devices in the entire converter system. The proposed topology is a hybrid of cascaded H-bridge multilevel inverter (CHBMLI) and neutral point clamped inverter multilevel inverter (NPCMLI) so as to obtain seven level output in each phase. Third harmonic injection is adopted to increase the line to line voltage. Asymmetric dc bus voltage ratio is used to increase the number of levels. The main objective of this hybridised structure is to increase the number of levels with reduced number of switches.","PeriodicalId":425226,"journal":{"name":"2014 Annual International Conference on Emerging Research Areas: Magnetics, Machines and Drives (AICERA/iCMMD)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-07-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Asymmetric multilevel hybrid inverter with reduced number of switches\",\"authors\":\"Babitha T. Abraham, A. Benny\",\"doi\":\"10.1109/AICERA.2014.6908176\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Multilevel Inverter is an array of power semiconductors and capacitors that allow the generation of a high quality load voltage. But it requires greater number of power semiconductor switches with increase in number of levels. In this paper, three phase hybrid topology of multilevel inverter is used to reduce the number of switching devices in the entire converter system. The proposed topology is a hybrid of cascaded H-bridge multilevel inverter (CHBMLI) and neutral point clamped inverter multilevel inverter (NPCMLI) so as to obtain seven level output in each phase. Third harmonic injection is adopted to increase the line to line voltage. Asymmetric dc bus voltage ratio is used to increase the number of levels. The main objective of this hybridised structure is to increase the number of levels with reduced number of switches.\",\"PeriodicalId\":425226,\"journal\":{\"name\":\"2014 Annual International Conference on Emerging Research Areas: Magnetics, Machines and Drives (AICERA/iCMMD)\",\"volume\":\"15 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-07-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 Annual International Conference on Emerging Research Areas: Magnetics, Machines and Drives (AICERA/iCMMD)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/AICERA.2014.6908176\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 Annual International Conference on Emerging Research Areas: Magnetics, Machines and Drives (AICERA/iCMMD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/AICERA.2014.6908176","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5

摘要

多电平逆变器是一组功率半导体和电容器,可以产生高质量的负载电压。但随着电平的增加,对功率半导体开关的要求也越来越高。本文采用多电平逆变器的三相混合拓扑结构来减少整个变换器系统中开关器件的数量。所提出的拓扑结构是级联h桥多电平逆变器(CHBMLI)和中性点箝位逆变多电平逆变器(NPCMLI)的混合结构,从而在每相获得7电平输出。采用三次谐波注入,提高线对线电压。非对称直流母线电压比用于增加电平数。这种混合结构的主要目的是在减少开关数量的同时增加电平的数量。
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Asymmetric multilevel hybrid inverter with reduced number of switches
Multilevel Inverter is an array of power semiconductors and capacitors that allow the generation of a high quality load voltage. But it requires greater number of power semiconductor switches with increase in number of levels. In this paper, three phase hybrid topology of multilevel inverter is used to reduce the number of switching devices in the entire converter system. The proposed topology is a hybrid of cascaded H-bridge multilevel inverter (CHBMLI) and neutral point clamped inverter multilevel inverter (NPCMLI) so as to obtain seven level output in each phase. Third harmonic injection is adopted to increase the line to line voltage. Asymmetric dc bus voltage ratio is used to increase the number of levels. The main objective of this hybridised structure is to increase the number of levels with reduced number of switches.
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