{"title":"未来主流企业平台的十亿晶体管芯片","authors":"D. Bhandarkar","doi":"10.1109/HPCA.2003.1183519","DOIUrl":null,"url":null,"abstract":"Today’s leading edge microprocessors like the Intel’s Itanium ® 2 Processor feature over 220 million transistors in 0.18µm semiconductor process technology. Nanotechnology that continues to drive Moore’s Law provides a doubling of the transistor density every two years. This indicates that a Billion transistor chip is possible in the 65 nm technology within the next 3 to 4 years. Such chips can be used in mainstream enterprise server platforms. This talk will review the progress in semiconductor technology over the last 3 decades since the introduction of the first microprocessor in 1971. A short video tape will provide a historical perspective on Moore’s Law in the form of an interview with co-founder Gordon Moore, and his thoughts for the future of semiconductor technology. Key trends in high end microprocessor design including multi-threading and multi-core will be covered. We have started to see “SMP-on-a-chip” designs for high-end enterprise servers where two processors with Level 2 (L2) cache are incorporated on a single chip. Future microprocessors will offer higher levels of multiprocessor capability on chip as the transistor density increases.","PeriodicalId":150992,"journal":{"name":"The Ninth International Symposium on High-Performance Computer Architecture, 2003. HPCA-9 2003. Proceedings.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-02-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Billion transistor chips in mainstream enterprise platforms of the future\",\"authors\":\"D. Bhandarkar\",\"doi\":\"10.1109/HPCA.2003.1183519\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Today’s leading edge microprocessors like the Intel’s Itanium ® 2 Processor feature over 220 million transistors in 0.18µm semiconductor process technology. Nanotechnology that continues to drive Moore’s Law provides a doubling of the transistor density every two years. This indicates that a Billion transistor chip is possible in the 65 nm technology within the next 3 to 4 years. Such chips can be used in mainstream enterprise server platforms. This talk will review the progress in semiconductor technology over the last 3 decades since the introduction of the first microprocessor in 1971. A short video tape will provide a historical perspective on Moore’s Law in the form of an interview with co-founder Gordon Moore, and his thoughts for the future of semiconductor technology. Key trends in high end microprocessor design including multi-threading and multi-core will be covered. We have started to see “SMP-on-a-chip” designs for high-end enterprise servers where two processors with Level 2 (L2) cache are incorporated on a single chip. Future microprocessors will offer higher levels of multiprocessor capability on chip as the transistor density increases.\",\"PeriodicalId\":150992,\"journal\":{\"name\":\"The Ninth International Symposium on High-Performance Computer Architecture, 2003. HPCA-9 2003. Proceedings.\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-02-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"The Ninth International Symposium on High-Performance Computer Architecture, 2003. HPCA-9 2003. Proceedings.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/HPCA.2003.1183519\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"The Ninth International Symposium on High-Performance Computer Architecture, 2003. HPCA-9 2003. Proceedings.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HPCA.2003.1183519","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Billion transistor chips in mainstream enterprise platforms of the future
Today’s leading edge microprocessors like the Intel’s Itanium ® 2 Processor feature over 220 million transistors in 0.18µm semiconductor process technology. Nanotechnology that continues to drive Moore’s Law provides a doubling of the transistor density every two years. This indicates that a Billion transistor chip is possible in the 65 nm technology within the next 3 to 4 years. Such chips can be used in mainstream enterprise server platforms. This talk will review the progress in semiconductor technology over the last 3 decades since the introduction of the first microprocessor in 1971. A short video tape will provide a historical perspective on Moore’s Law in the form of an interview with co-founder Gordon Moore, and his thoughts for the future of semiconductor technology. Key trends in high end microprocessor design including multi-threading and multi-core will be covered. We have started to see “SMP-on-a-chip” designs for high-end enterprise servers where two processors with Level 2 (L2) cache are incorporated on a single chip. Future microprocessors will offer higher levels of multiprocessor capability on chip as the transistor density increases.