P. Rajesh George, M. Mary Jermila, Anwar K Backer, A. Anvar, N. Aparna Vishnu
{"title":"软件锁相环MEMS速率传感器的驱动方式","authors":"P. Rajesh George, M. Mary Jermila, Anwar K Backer, A. Anvar, N. Aparna Vishnu","doi":"10.1109/ICMSS53060.2021.9673591","DOIUrl":null,"url":null,"abstract":"A specialized processing and control loop design for a highly stable Software Phase Locked Loop (SPLL) & Digital Amplitude Control Loop (DACL) for MEMS Rate Sensor is discussed. The rate sensor requires good vibration amplitude stability with resonant frequency tracking as well as start-up characteristic with pre-defined frequency response. The control loops are analyzed and simulated in MATLAB, digitally implemented in a custom designed STM32F407 processor board with inbuilt unipolar 12-bit SAR ADC and DAC. Practical test results for different SPLL implementations are compared.","PeriodicalId":274597,"journal":{"name":"2021 Fourth International Conference on Microelectronics, Signals & Systems (ICMSS)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Drive Mode of MEMS Rate Sensors with Software Phase Locked Loop\",\"authors\":\"P. Rajesh George, M. Mary Jermila, Anwar K Backer, A. Anvar, N. Aparna Vishnu\",\"doi\":\"10.1109/ICMSS53060.2021.9673591\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A specialized processing and control loop design for a highly stable Software Phase Locked Loop (SPLL) & Digital Amplitude Control Loop (DACL) for MEMS Rate Sensor is discussed. The rate sensor requires good vibration amplitude stability with resonant frequency tracking as well as start-up characteristic with pre-defined frequency response. The control loops are analyzed and simulated in MATLAB, digitally implemented in a custom designed STM32F407 processor board with inbuilt unipolar 12-bit SAR ADC and DAC. Practical test results for different SPLL implementations are compared.\",\"PeriodicalId\":274597,\"journal\":{\"name\":\"2021 Fourth International Conference on Microelectronics, Signals & Systems (ICMSS)\",\"volume\":\"36 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-11-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 Fourth International Conference on Microelectronics, Signals & Systems (ICMSS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICMSS53060.2021.9673591\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 Fourth International Conference on Microelectronics, Signals & Systems (ICMSS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICMSS53060.2021.9673591","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Drive Mode of MEMS Rate Sensors with Software Phase Locked Loop
A specialized processing and control loop design for a highly stable Software Phase Locked Loop (SPLL) & Digital Amplitude Control Loop (DACL) for MEMS Rate Sensor is discussed. The rate sensor requires good vibration amplitude stability with resonant frequency tracking as well as start-up characteristic with pre-defined frequency response. The control loops are analyzed and simulated in MATLAB, digitally implemented in a custom designed STM32F407 processor board with inbuilt unipolar 12-bit SAR ADC and DAC. Practical test results for different SPLL implementations are compared.
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
