M. Rodwell, Q. Lee, D. Mensa, R. Pullela, J. Guthrie, S. Martin, R.P. Smith, S. Jaganathan, T. Mathew, B. Agarwal, S. Long
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引用次数: 14
摘要
利用衬底转移工艺，我们制造了具有亚微米发射基和集电极基结的异质结双极晶体管，最大限度地减少了RC寄生，并将f/sub max/提高到500 GHz。该工艺还提供了在低/spl epsiv/ sub /介电基板上的微带布线环境。当作为静态分频器连接时，ECL主从触发器的第一次设计迭代显示48 GHz的最大时钟频率。
48 GHz digital ICs using transferred-substrate HBTs
Using substrate transfer processes, we have fabricated heterojunction bipolar transistors with submicron emitter-base and collector-base junctions, minimizing RC parasitics and increasing f/sub max/ to 500 GHz. The process also provides a microstrip wiring environment on a low-/spl epsiv//sub r/ dielectric substrate. First design iterations of ECL master-slave flip-flops exhibit 48 GHz maximum clock frequency when connected as static frequency dividers.
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