Mapping locally recursive SEGs upon a multiprocessor system in a ring network

A multiprocessor code generation method for digital signal processing algorithms represented by SFGs (signal flow graphs) is developed. For reducing the number of communication operations as well as distributing the workload evenly among the processors, a multiprocessor scheduling method based on a parallel block processing scheme, which processes multiple blocks of input data concurrently, is employed. The developed method first divides an SFG into graph segments to reduce the dependency time. A segment merging process is followed, which results less number of temporary data storages and data transfers. A multiprocessor code is generated by applying a single processor code generation method to each of these segments. The implementation result for QR-RLS algorithm using the developed method is included.<>