DSP设计采用VLIW架构

L. Lee, B.S. Suparjo, R. Wagiran, R. Sidek
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引用次数: 3

摘要

可编程数字信号处理器(pDSPs)是一种专门用于数字信号处理密集型应用的微处理器。一个标准的微处理器可以完成大多数的pDSP操作。然而,pDSP芯片具有更好的实时执行数字运算算法的能力,并且pDSP具有高度的灵活性,因为它们可以重新编程。本研究的主要目标是设计和实现一个通用的可编程DSP核心(数字信号处理器核心)。pDSP核心的架构必须设计成这样一种方式,即可以利用并行处理和计算单元可以轻松地集成到核心中。所设计的pDSP是一种基于甚长指令字(VLIW)架构的定点DSP。克服性能限制的一种方法是使用现场可编程门阵列(FPGA)技术,该技术为设计人员提供了更高程度的并行性和易于设计的pDSP。
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DSP design using VLIW architecture
Programmable digital signal processors (pDSPs) are microprocessors that are specialized to perform well in digital signal processing intensive applications. A standard microprocessor can do most pDSP operations. However, the pDSP chip has better ability to perform number crunching algorithms in real-time, and pDSPs are highly flexible because they can be reprogrammed. The major objective of this research is to design and implement a general-purpose programmable DSP core (digital signal processor core). The architecture of the pDSP core must be designed in such a way that parallel processing can be exploited and computational units can be integrated into the core with ease. The pDSP designed is a fixed-point DSP based on a very long instruction word (VLIW) architecture. One way to overcome the performance limitation is to use field programmable gate array (FPGA) technology, a technology which gives the designer a higher degree of parallelism and ease of pDSP design.
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