{"title":"具有高效数据组织的SIMD视频信号处理器","authors":"Kunjie Liu, Xing Qin, Xiaolang Yan, Li Quan","doi":"10.1109/ASSCC.2006.357865","DOIUrl":null,"url":null,"abstract":"A single instruction multiple data (SIMD) video signal processor (VSP) is presented in this paper. To provide flexible and efficient data organization, a separate control/data-preparing pipeline and global switch register file with write-transposer and read-permuter is designed. Since data preparation is offloaded from computing core, this VSP promises sustained performance close to its peak computational rates of 64-bit SIMD ALU/MAC datapath. The benchmarking shows that the proposed VSP forms a highly efficient solution to emerging H.264/AVC video decoder.","PeriodicalId":142478,"journal":{"name":"2006 IEEE Asian Solid-State Circuits Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"A SIMD Video Signal Processor with Efficient Data Organization\",\"authors\":\"Kunjie Liu, Xing Qin, Xiaolang Yan, Li Quan\",\"doi\":\"10.1109/ASSCC.2006.357865\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A single instruction multiple data (SIMD) video signal processor (VSP) is presented in this paper. To provide flexible and efficient data organization, a separate control/data-preparing pipeline and global switch register file with write-transposer and read-permuter is designed. Since data preparation is offloaded from computing core, this VSP promises sustained performance close to its peak computational rates of 64-bit SIMD ALU/MAC datapath. The benchmarking shows that the proposed VSP forms a highly efficient solution to emerging H.264/AVC video decoder.\",\"PeriodicalId\":142478,\"journal\":{\"name\":\"2006 IEEE Asian Solid-State Circuits Conference\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 IEEE Asian Solid-State Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASSCC.2006.357865\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE Asian Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASSCC.2006.357865","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A SIMD Video Signal Processor with Efficient Data Organization
A single instruction multiple data (SIMD) video signal processor (VSP) is presented in this paper. To provide flexible and efficient data organization, a separate control/data-preparing pipeline and global switch register file with write-transposer and read-permuter is designed. Since data preparation is offloaded from computing core, this VSP promises sustained performance close to its peak computational rates of 64-bit SIMD ALU/MAC datapath. The benchmarking shows that the proposed VSP forms a highly efficient solution to emerging H.264/AVC video decoder.
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