J. R. Custódio, L. B. Oliveira, J. Goes, J. Oliveira, E. Bruun, P. Andreani
{"title":"具有消噪和增益增强的小面积自偏置宽带CMOS平衡LNA","authors":"J. R. Custódio, L. B. Oliveira, J. Goes, J. Oliveira, E. Bruun, P. Andreani","doi":"10.1109/NORCHIP.2010.5669429","DOIUrl":null,"url":null,"abstract":"In this paper we present a low-power and small-area balun LNA. The proposed inverter-based topology uses self-biasing and noise cancelling, yielding a very robust LNA with a low NF. Comparing this circuit with a conventional inverter-based circuit, we obtain a ∼3 dB enhancement in voltage gain, with improved robustness against PVT variations. Simulations results in a 130 nm CMOS technology show a 17.7dB voltage gain, nearly flat over a wide bandwidth (200MHz–1GHz), and an NF of approximately 4dB. The total power consumption is below 7.5 mW, with a very small die area of 0.007 mm2. All data are extracted from post-layout simulations.","PeriodicalId":292342,"journal":{"name":"NORCHIP 2010","volume":"32 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"A small-area self-biased wideband CMOS balun LNA with noise cancelling and gain enhancement\",\"authors\":\"J. R. Custódio, L. B. Oliveira, J. Goes, J. Oliveira, E. Bruun, P. Andreani\",\"doi\":\"10.1109/NORCHIP.2010.5669429\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper we present a low-power and small-area balun LNA. The proposed inverter-based topology uses self-biasing and noise cancelling, yielding a very robust LNA with a low NF. Comparing this circuit with a conventional inverter-based circuit, we obtain a ∼3 dB enhancement in voltage gain, with improved robustness against PVT variations. Simulations results in a 130 nm CMOS technology show a 17.7dB voltage gain, nearly flat over a wide bandwidth (200MHz–1GHz), and an NF of approximately 4dB. The total power consumption is below 7.5 mW, with a very small die area of 0.007 mm2. All data are extracted from post-layout simulations.\",\"PeriodicalId\":292342,\"journal\":{\"name\":\"NORCHIP 2010\",\"volume\":\"32 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-12-17\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"NORCHIP 2010\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NORCHIP.2010.5669429\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"NORCHIP 2010","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NORCHIP.2010.5669429","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A small-area self-biased wideband CMOS balun LNA with noise cancelling and gain enhancement
In this paper we present a low-power and small-area balun LNA. The proposed inverter-based topology uses self-biasing and noise cancelling, yielding a very robust LNA with a low NF. Comparing this circuit with a conventional inverter-based circuit, we obtain a ∼3 dB enhancement in voltage gain, with improved robustness against PVT variations. Simulations results in a 130 nm CMOS technology show a 17.7dB voltage gain, nearly flat over a wide bandwidth (200MHz–1GHz), and an NF of approximately 4dB. The total power consumption is below 7.5 mW, with a very small die area of 0.007 mm2. All data are extracted from post-layout simulations.