{"title":"试验台板为16/spl倍/64立体视觉CNN芯片","authors":"M. Salerno, F. Sargeni, V. Bonaiuto","doi":"10.1109/CNNA.2002.1035109","DOIUrl":null,"url":null,"abstract":"The implementation of an artificial vision algorithm in real time is really attractive in such an application as the field of environment sensing. The SVCNN (stereo vision cellular neural network) chip is an analogue circuit able to compute in real time the Disparity Map from a couple of images by using a stereo visual system algorithm. A \"test-bed\" board for the 16/spl times/64 SVCNN chip is presented in this paper. This board is composed of an analogue processing core implemented by two 16/spl times/64 SVCNN chips together with a digital high performance pre-processing unit and a video grabbing section.","PeriodicalId":387716,"journal":{"name":"Proceedings of the 2002 7th IEEE International Workshop on Cellular Neural Networks and Their Applications","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2002-07-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Test-bed board for 16/spl times/64 stereo vision CNN chip\",\"authors\":\"M. Salerno, F. Sargeni, V. Bonaiuto\",\"doi\":\"10.1109/CNNA.2002.1035109\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The implementation of an artificial vision algorithm in real time is really attractive in such an application as the field of environment sensing. The SVCNN (stereo vision cellular neural network) chip is an analogue circuit able to compute in real time the Disparity Map from a couple of images by using a stereo visual system algorithm. A \\\"test-bed\\\" board for the 16/spl times/64 SVCNN chip is presented in this paper. This board is composed of an analogue processing core implemented by two 16/spl times/64 SVCNN chips together with a digital high performance pre-processing unit and a video grabbing section.\",\"PeriodicalId\":387716,\"journal\":{\"name\":\"Proceedings of the 2002 7th IEEE International Workshop on Cellular Neural Networks and Their Applications\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-07-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 2002 7th IEEE International Workshop on Cellular Neural Networks and Their Applications\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CNNA.2002.1035109\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 2002 7th IEEE International Workshop on Cellular Neural Networks and Their Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CNNA.2002.1035109","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Test-bed board for 16/spl times/64 stereo vision CNN chip
The implementation of an artificial vision algorithm in real time is really attractive in such an application as the field of environment sensing. The SVCNN (stereo vision cellular neural network) chip is an analogue circuit able to compute in real time the Disparity Map from a couple of images by using a stereo visual system algorithm. A "test-bed" board for the 16/spl times/64 SVCNN chip is presented in this paper. This board is composed of an analogue processing core implemented by two 16/spl times/64 SVCNN chips together with a digital high performance pre-processing unit and a video grabbing section.
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