{"title":"2.4 gb /s CMOS时钟恢复1:8解复用器","authors":"Soda, Tezuka, Shioiri, Tanabe, Furukawa, Togo, Tamura, Yoshida","doi":"10.1109/VLSIC.1997.623811","DOIUrl":null,"url":null,"abstract":"","PeriodicalId":175678,"journal":{"name":"Symposium 1997 on VLSI Circuits","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"A 2.4-Gb/s CMOS clock recovering 1:8 demultiplexer\",\"authors\":\"Soda, Tezuka, Shioiri, Tanabe, Furukawa, Togo, Tamura, Yoshida\",\"doi\":\"10.1109/VLSIC.1997.623811\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"\",\"PeriodicalId\":175678,\"journal\":{\"name\":\"Symposium 1997 on VLSI Circuits\",\"volume\":\"7 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-06-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Symposium 1997 on VLSI Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIC.1997.623811\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Symposium 1997 on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.1997.623811","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6