125 mW/MIPS超高速低功耗非对称数字用户线路收发芯片的设计与实现

Seong-Jo Na, M.M.-O. Lee, Ting-Hong Chung, Seung-Min Lee, J.H. Kim
{"title":"125 mW/MIPS超高速低功耗非对称数字用户线路收发芯片的设计与实现","authors":"Seong-Jo Na, M.M.-O. Lee, Ting-Hong Chung, Seung-Min Lee, J.H. Kim","doi":"10.1109/APASIC.1999.824014","DOIUrl":null,"url":null,"abstract":"Multimedia service with audio and video have become most desirable as the ADSL technology ideally converted from 1.5 Mbps full duplex HDSL technology via two twist-pair into 6.144 Mbps transmission technology via single twist-pair. This results in an interactive transmission service of T1 & E1 class data using the subscriber line without repeaters. The ADSL transceiver chipset is configured by DMT (Discrete Multi Tone modulation) scheme and RISC-based DSP core structure. Our ADSL chip is to be used in VOD, interactive interact service and/or teleconferencing system, etc. The operating frequency and dissipated power of the chip are 40 MHz and 5 W at 5 V.","PeriodicalId":346808,"journal":{"name":"AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-08-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design and implementation for 125 mW/MIPS ultra-high speed low power asymmetric digital subscriber line transceiver chip\",\"authors\":\"Seong-Jo Na, M.M.-O. Lee, Ting-Hong Chung, Seung-Min Lee, J.H. Kim\",\"doi\":\"10.1109/APASIC.1999.824014\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Multimedia service with audio and video have become most desirable as the ADSL technology ideally converted from 1.5 Mbps full duplex HDSL technology via two twist-pair into 6.144 Mbps transmission technology via single twist-pair. This results in an interactive transmission service of T1 & E1 class data using the subscriber line without repeaters. The ADSL transceiver chipset is configured by DMT (Discrete Multi Tone modulation) scheme and RISC-based DSP core structure. Our ADSL chip is to be used in VOD, interactive interact service and/or teleconferencing system, etc. The operating frequency and dissipated power of the chip are 40 MHz and 5 W at 5 V.\",\"PeriodicalId\":346808,\"journal\":{\"name\":\"AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360)\",\"volume\":\"32 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1999-08-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APASIC.1999.824014\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APASIC.1999.824014","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

随着ADSL技术从通过双绞线的1.5 Mbps全双工HDSL技术理想地转换为通过单绞线的6.144 Mbps传输技术,具有音频和视频的多媒体业务已成为最理想的。这就产生了使用用户线路的T1和E1级数据的交互式传输服务,而无需中继器。ADSL收发器芯片组采用离散多音调制(DMT)方案和基于risc的DSP核心结构。我们的ADSL芯片适用于视频点播、交互式交互服务和/或电话会议系统等。芯片工作频率为40mhz,功耗为5w,电压为5v。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
Design and implementation for 125 mW/MIPS ultra-high speed low power asymmetric digital subscriber line transceiver chip
Multimedia service with audio and video have become most desirable as the ADSL technology ideally converted from 1.5 Mbps full duplex HDSL technology via two twist-pair into 6.144 Mbps transmission technology via single twist-pair. This results in an interactive transmission service of T1 & E1 class data using the subscriber line without repeaters. The ADSL transceiver chipset is configured by DMT (Discrete Multi Tone modulation) scheme and RISC-based DSP core structure. Our ADSL chip is to be used in VOD, interactive interact service and/or teleconferencing system, etc. The operating frequency and dissipated power of the chip are 40 MHz and 5 W at 5 V.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
A 50% power reduction scheme for CMOS relaxation oscillator Design and analysis of symmetric dual-layer spiral inductors for RF integrated circuits Implementation of a cycle-based simulator for the design of a processor core A high-performance low-power asynchronous matrix-vector multiplier for discrete cosine transform A 120 MHz SC 4th-order elliptic interpolation filter with accurate gain and offset compensation for direct digital frequency synthesizer
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1