{"title":"基于FPGA的模糊逻辑可控环滤波器的DPLL","authors":"M. Moradi, M. Ehsanian","doi":"10.1109/ICM.2017.8268812","DOIUrl":null,"url":null,"abstract":"Carrier recovery is very essential in tracking systems especially in noisy environment and high dynamic receivers. There are different PLL approaches that are proposed for making compromise between noise and dynamic in literatures. Here, a novel Digital PLL is proposed with a type-2 fuzzy logic controller for improving compatibility with noise and user dynamic in digital receivers. Adjusting filter coefficients with a type-2 Fuzzy Logic controller will result in best operation for rejecting noise and dynamic compensation. The proposed DPLL resultant by Xilinx System Generator shows better response to phase step, input signal jitter, frequency step and ramp signals.","PeriodicalId":115975,"journal":{"name":"2017 29th International Conference on Microelectronics (ICM)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"An FPGA based DPLL with fuzzy logic controllable loop filters\",\"authors\":\"M. Moradi, M. Ehsanian\",\"doi\":\"10.1109/ICM.2017.8268812\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Carrier recovery is very essential in tracking systems especially in noisy environment and high dynamic receivers. There are different PLL approaches that are proposed for making compromise between noise and dynamic in literatures. Here, a novel Digital PLL is proposed with a type-2 fuzzy logic controller for improving compatibility with noise and user dynamic in digital receivers. Adjusting filter coefficients with a type-2 Fuzzy Logic controller will result in best operation for rejecting noise and dynamic compensation. The proposed DPLL resultant by Xilinx System Generator shows better response to phase step, input signal jitter, frequency step and ramp signals.\",\"PeriodicalId\":115975,\"journal\":{\"name\":\"2017 29th International Conference on Microelectronics (ICM)\",\"volume\":\"22 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 29th International Conference on Microelectronics (ICM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICM.2017.8268812\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 29th International Conference on Microelectronics (ICM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICM.2017.8268812","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An FPGA based DPLL with fuzzy logic controllable loop filters
Carrier recovery is very essential in tracking systems especially in noisy environment and high dynamic receivers. There are different PLL approaches that are proposed for making compromise between noise and dynamic in literatures. Here, a novel Digital PLL is proposed with a type-2 fuzzy logic controller for improving compatibility with noise and user dynamic in digital receivers. Adjusting filter coefficients with a type-2 Fuzzy Logic controller will result in best operation for rejecting noise and dynamic compensation. The proposed DPLL resultant by Xilinx System Generator shows better response to phase step, input signal jitter, frequency step and ramp signals.