Xu Yong, Zhao Fei, Wu Yuanliang, Min Rui, Sun Zheng, Tang Lu
{"title":"闭环D类音频功率放大器的单片机设计","authors":"Xu Yong, Zhao Fei, Wu Yuanliang, Min Rui, Sun Zheng, Tang Lu","doi":"10.1109/WCSP.2010.5633477","DOIUrl":null,"url":null,"abstract":"A single chip design of class D audio power amplifier is presented. It is composed with a rail-to-rail operational amplifier and a closed-loop pulse width modulation. It achieves a maxim power of 3.75W and consumes about 1.9mA quiescent current as maxim efficiency is more than 90%. When sine wave input signal frequency is 1KHz and output power is 3.75W, the THE) of output signal is only 0.1%. The chip is designed with thermal protection which turns the device off when the junction temperature surpasses 150°C to prevent damage to the IC.","PeriodicalId":448094,"journal":{"name":"2010 International Conference on Wireless Communications & Signal Processing (WCSP)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Single chip design of closed-loop class D audio power amplifier\",\"authors\":\"Xu Yong, Zhao Fei, Wu Yuanliang, Min Rui, Sun Zheng, Tang Lu\",\"doi\":\"10.1109/WCSP.2010.5633477\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A single chip design of class D audio power amplifier is presented. It is composed with a rail-to-rail operational amplifier and a closed-loop pulse width modulation. It achieves a maxim power of 3.75W and consumes about 1.9mA quiescent current as maxim efficiency is more than 90%. When sine wave input signal frequency is 1KHz and output power is 3.75W, the THE) of output signal is only 0.1%. The chip is designed with thermal protection which turns the device off when the junction temperature surpasses 150°C to prevent damage to the IC.\",\"PeriodicalId\":448094,\"journal\":{\"name\":\"2010 International Conference on Wireless Communications & Signal Processing (WCSP)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-11-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 International Conference on Wireless Communications & Signal Processing (WCSP)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/WCSP.2010.5633477\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 International Conference on Wireless Communications & Signal Processing (WCSP)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/WCSP.2010.5633477","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Single chip design of closed-loop class D audio power amplifier
A single chip design of class D audio power amplifier is presented. It is composed with a rail-to-rail operational amplifier and a closed-loop pulse width modulation. It achieves a maxim power of 3.75W and consumes about 1.9mA quiescent current as maxim efficiency is more than 90%. When sine wave input signal frequency is 1KHz and output power is 3.75W, the THE) of output signal is only 0.1%. The chip is designed with thermal protection which turns the device off when the junction temperature surpasses 150°C to prevent damage to the IC.
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